49 lines
1.8 KiB
ArmAsm
49 lines
1.8 KiB
ArmAsm
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# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
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# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -iterations=1 -resource-pressure=0 -timeline < %s | FileCheck %s
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imull %esi
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imull (%rdi)
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# The second integer multiply can start at cycle 2 because the implicit reads
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# can start after the load operand is evaluated.
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# CHECK: Iterations: 1
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# CHECK-NEXT: Instructions: 2
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# CHECK-NEXT: Total Cycles: 13
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# CHECK-NEXT: Total uOps: 7
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# CHECK: Dispatch Width: 4
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# CHECK-NEXT: uOps Per Cycle: 0.54
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# CHECK-NEXT: IPC: 0.15
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# CHECK-NEXT: Block RThroughput: 2.0
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# CHECK: Instruction Info:
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# CHECK-NEXT: [1]: #uOps
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# CHECK-NEXT: [2]: Latency
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# CHECK-NEXT: [3]: RThroughput
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# CHECK-NEXT: [4]: MayLoad
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# CHECK-NEXT: [5]: MayStore
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# CHECK-NEXT: [6]: HasSideEffects (U)
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# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
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# CHECK-NEXT: 3 4 1.00 imull %esi
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# CHECK-NEXT: 4 9 1.00 * imull (%rdi)
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# CHECK: Timeline view:
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# CHECK-NEXT: 012
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# CHECK-NEXT: Index 0123456789
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# CHECK: [0,0] DeeeeER . . imull %esi
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# CHECK-NEXT: [0,1] .DeeeeeeeeeER imull (%rdi)
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# CHECK: Average Wait times (based on the timeline view):
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# CHECK-NEXT: [0]: Executions
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# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
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# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
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# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
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# CHECK: [0] [1] [2] [3]
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# CHECK-NEXT: 0. 1 1.0 1.0 0.0 imull %esi
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# CHECK-NEXT: 1. 1 1.0 1.0 0.0 imull (%rdi)
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# CHECK-NEXT: 1 1.0 1.0 0.0 <total>
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