13 lines
423 B
ArmAsm
13 lines
423 B
ArmAsm
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# RUN: llvm-exegesis -mode=latency -opcode-name=ADDXrr | FileCheck %s
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CHECK: ---
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CHECK-NEXT: mode: latency
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CHECK-NEXT: key:
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CHECK-NEXT: instructions:
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CHECK-NEXT: ADDXrr [[REG1:X[0-9]+|LR]] [[REG2:X[0-9]+|LR]] [[REG3:X[0-9]+|LR]]
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CHECK-NEXT: config: ''
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CHECK-NEXT: register_initial_values:
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CHECK-DAG: - '[[REG2]]=0x0'
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# We don't check REG3 because in the case that REG2=REG3 the check would fail
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CHECK-LAST: ...
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