163 lines
7.1 KiB
LLVM
163 lines
7.1 KiB
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -slp-vectorizer -slp-threshold=-18 < %s | FileCheck %s
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; Make sure there's no SCEV assert when the indexes are for different
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; sized address spaces
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target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5"
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define void @slp_scev_assert(i32 %idx, i64 %tmp3) #0 {
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; CHECK-LABEL: @slp_scev_assert(
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; CHECK-NEXT: bb:
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; CHECK-NEXT: [[TMP:%.*]] = addrspacecast i8 addrspace(5)* undef to i8*
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; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i8, i8 addrspace(5)* undef, i32 [[IDX:%.*]]
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; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds i8, i8* [[TMP]], i64 [[TMP3:%.*]]
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; CHECK-NEXT: store i8 0, i8 addrspace(5)* [[TMP2]]
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; CHECK-NEXT: store i8 0, i8* [[TMP4]]
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; CHECK-NEXT: ret void
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;
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bb:
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%tmp = addrspacecast i8 addrspace(5)* undef to i8*
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%tmp2 = getelementptr inbounds i8, i8 addrspace(5)* undef, i32 %idx
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%tmp4 = getelementptr inbounds i8, i8* %tmp, i64 %tmp3
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store i8 0, i8 addrspace(5)* %tmp2
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store i8 0, i8* %tmp4
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ret void
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}
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define void @multi_as_reduction_different_sized(i32 addrspace(3)* %lds, i32 %idx0, i64 %idx1) #0 {
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; CHECK-LABEL: @multi_as_reduction_different_sized(
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; CHECK-NEXT: bb:
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; CHECK-NEXT: [[FLAT:%.*]] = addrspacecast i32 addrspace(3)* [[LDS:%.*]] to i32*
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; CHECK-NEXT: [[ADD0:%.*]] = add i32 [[IDX0:%.*]], 2
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; CHECK-NEXT: [[ADD1:%.*]] = add i64 [[IDX1:%.*]], 1
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; CHECK-NEXT: [[LDS_1:%.*]] = getelementptr inbounds i32, i32 addrspace(3)* [[LDS]], i32 [[ADD0]]
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; CHECK-NEXT: [[FLAT_1:%.*]] = getelementptr inbounds i32, i32* [[FLAT]], i64 [[ADD1]]
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; CHECK-NEXT: [[LOAD_LDS_0:%.*]] = load i32, i32 addrspace(3)* [[LDS]], align 4
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; CHECK-NEXT: [[LOAD_LDS_1:%.*]] = load i32, i32 addrspace(3)* [[LDS_1]], align 4
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; CHECK-NEXT: [[LOAD_FLAT_0:%.*]] = load i32, i32* [[FLAT]], align 4
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; CHECK-NEXT: [[LOAD_FLAT_1:%.*]] = load i32, i32* [[FLAT_1]], align 4
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; CHECK-NEXT: [[SUB0:%.*]] = sub i32 [[LOAD_FLAT_0]], [[LOAD_LDS_0]]
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; CHECK-NEXT: [[SUB1:%.*]] = sub i32 [[LOAD_FLAT_1]], [[LOAD_LDS_1]]
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; CHECK-NEXT: store i32 [[SUB0]], i32* undef
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; CHECK-NEXT: store i32 [[SUB1]], i32* undef
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; CHECK-NEXT: ret void
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;
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bb:
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%flat = addrspacecast i32 addrspace(3)* %lds to i32*
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%add0 = add i32 %idx0, 2
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%add1 = add i64 %idx1, 1
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%lds.1 = getelementptr inbounds i32, i32 addrspace(3)* %lds, i32 %add0
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%flat.1 = getelementptr inbounds i32, i32* %flat, i64 %add1
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%load.lds.0 = load i32, i32 addrspace(3)* %lds, align 4
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%load.lds.1 = load i32, i32 addrspace(3)* %lds.1, align 4
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%load.flat.0 = load i32, i32* %flat, align 4
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%load.flat.1 = load i32, i32* %flat.1, align 4
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%sub0 = sub i32 %load.flat.0, %load.lds.0
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%sub1 = sub i32 %load.flat.1, %load.lds.1
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store i32 %sub0, i32* undef
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store i32 %sub1, i32* undef
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ret void
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}
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; This should vectorize if using getUnderlyingObject
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define void @multi_as_reduction_same_size(i32 addrspace(1)* %global, i64 %idx0, i64 %idx1) #0 {
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; CHECK-LABEL: @multi_as_reduction_same_size(
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; CHECK-NEXT: bb:
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; CHECK-NEXT: [[FLAT:%.*]] = addrspacecast i32 addrspace(1)* [[GLOBAL:%.*]] to i32*
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; CHECK-NEXT: [[ADD0:%.*]] = add i64 [[IDX0:%.*]], 2
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; CHECK-NEXT: [[ADD1:%.*]] = add i64 [[IDX1:%.*]], 1
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; CHECK-NEXT: [[GLOBAL_1:%.*]] = getelementptr inbounds i32, i32 addrspace(1)* [[GLOBAL]], i64 [[ADD0]]
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; CHECK-NEXT: [[FLAT_1:%.*]] = getelementptr inbounds i32, i32* [[FLAT]], i64 [[ADD1]]
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; CHECK-NEXT: [[LOAD_GLOBAL_0:%.*]] = load i32, i32 addrspace(1)* [[GLOBAL]], align 4
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; CHECK-NEXT: [[LOAD_GLOBAL_1:%.*]] = load i32, i32 addrspace(1)* [[GLOBAL_1]], align 4
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; CHECK-NEXT: [[LOAD_FLAT_0:%.*]] = load i32, i32* [[FLAT]], align 4
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; CHECK-NEXT: [[LOAD_FLAT_1:%.*]] = load i32, i32* [[FLAT_1]], align 4
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; CHECK-NEXT: [[SUB0:%.*]] = sub i32 [[LOAD_FLAT_0]], [[LOAD_GLOBAL_0]]
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; CHECK-NEXT: [[SUB1:%.*]] = sub i32 [[LOAD_FLAT_1]], [[LOAD_GLOBAL_1]]
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; CHECK-NEXT: store i32 [[SUB0]], i32* undef
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; CHECK-NEXT: store i32 [[SUB1]], i32* undef
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; CHECK-NEXT: ret void
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;
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bb:
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%flat = addrspacecast i32 addrspace(1)* %global to i32*
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%add0 = add i64 %idx0, 2
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%add1 = add i64 %idx1, 1
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%global.1 = getelementptr inbounds i32, i32 addrspace(1)* %global, i64 %add0
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%flat.1 = getelementptr inbounds i32, i32* %flat, i64 %add1
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%load.global.0 = load i32, i32 addrspace(1)* %global, align 4
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%load.global.1 = load i32, i32 addrspace(1)* %global.1, align 4
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%load.flat.0 = load i32, i32* %flat, align 4
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%load.flat.1 = load i32, i32* %flat.1, align 4
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%sub0 = sub i32 %load.flat.0, %load.global.0
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%sub1 = sub i32 %load.flat.1, %load.global.1
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store i32 %sub0, i32* undef
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store i32 %sub1, i32* undef
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ret void
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}
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; This should vectorize if using getUnderlyingObject
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; The add is done in the same width, even though the address space size is smaller
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define void @multi_as_reduction_different_sized_noncanon(i32 addrspace(3)* %lds, i64 %idx0, i64 %idx1) #0 {
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; CHECK-LABEL: @multi_as_reduction_different_sized_noncanon(
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; CHECK-NEXT: bb:
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; CHECK-NEXT: [[FLAT:%.*]] = addrspacecast i32 addrspace(3)* [[LDS:%.*]] to i32*
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; CHECK-NEXT: [[ADD0:%.*]] = add i64 [[IDX0:%.*]], 2
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; CHECK-NEXT: [[ADD1:%.*]] = add i64 [[IDX1:%.*]], 1
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; CHECK-NEXT: [[LDS_1:%.*]] = getelementptr inbounds i32, i32 addrspace(3)* [[LDS]], i64 [[ADD0]]
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; CHECK-NEXT: [[FLAT_1:%.*]] = getelementptr inbounds i32, i32* [[FLAT]], i64 [[ADD1]]
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; CHECK-NEXT: [[LOAD_LDS_0:%.*]] = load i32, i32 addrspace(3)* [[LDS]], align 4
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; CHECK-NEXT: [[LOAD_LDS_1:%.*]] = load i32, i32 addrspace(3)* [[LDS_1]], align 4
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; CHECK-NEXT: [[LOAD_FLAT_0:%.*]] = load i32, i32* [[FLAT]], align 4
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; CHECK-NEXT: [[LOAD_FLAT_1:%.*]] = load i32, i32* [[FLAT_1]], align 4
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; CHECK-NEXT: [[SUB0:%.*]] = sub i32 [[LOAD_FLAT_0]], [[LOAD_LDS_0]]
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; CHECK-NEXT: [[SUB1:%.*]] = sub i32 [[LOAD_FLAT_1]], [[LOAD_LDS_1]]
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; CHECK-NEXT: store i32 [[SUB0]], i32* undef
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; CHECK-NEXT: store i32 [[SUB1]], i32* undef
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; CHECK-NEXT: ret void
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;
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bb:
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%flat = addrspacecast i32 addrspace(3)* %lds to i32*
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%add0 = add i64 %idx0, 2
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%add1 = add i64 %idx1, 1
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%lds.1 = getelementptr inbounds i32, i32 addrspace(3)* %lds, i64 %add0
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%flat.1 = getelementptr inbounds i32, i32* %flat, i64 %add1
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%load.lds.0 = load i32, i32 addrspace(3)* %lds, align 4
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%load.lds.1 = load i32, i32 addrspace(3)* %lds.1, align 4
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%load.flat.0 = load i32, i32* %flat, align 4
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%load.flat.1 = load i32, i32* %flat.1, align 4
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%sub0 = sub i32 %load.flat.0, %load.lds.0
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%sub1 = sub i32 %load.flat.1, %load.lds.1
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store i32 %sub0, i32* undef
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store i32 %sub1, i32* undef
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ret void
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}
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; CHECK-LABEL: slp_crash_on_addrspacecast
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; CHECK: ret void
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define void @slp_crash_on_addrspacecast() {
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entry:
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%0 = getelementptr inbounds i64, i64 addrspace(3)* undef, i32 undef
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%p0 = addrspacecast i64 addrspace(3)* %0 to i64*
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store i64 undef, i64* %p0, align 8
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%1 = getelementptr inbounds i64, i64 addrspace(3)* undef, i32 undef
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%p1 = addrspacecast i64 addrspace(3)* %1 to i64*
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store i64 undef, i64* %p1, align 8
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ret void
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}
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