381 lines
10 KiB
LLVM
381 lines
10 KiB
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -loop-deletion -S | FileCheck %s
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@G = external global i32
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define void @test_trivial() {
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; CHECK-LABEL: @test_trivial(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[LOOP:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: store i32 0, i32* @G, align 4
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; CHECK-NEXT: br i1 false, label [[LOOP_LOOP_CRIT_EDGE:%.*]], label [[EXIT:%.*]]
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; CHECK: loop.loop_crit_edge:
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; CHECK-NEXT: unreachable
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; CHECK: exit:
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; CHECK-NEXT: ret void
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;
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entry:
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br label %loop
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loop:
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store i32 0, i32* @G
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br i1 false, label %loop, label %exit
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exit:
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ret void
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}
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define void @test_bottom_tested() {
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; CHECK-LABEL: @test_bottom_tested(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[LOOP:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ]
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; CHECK-NEXT: store i32 0, i32* @G, align 4
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; CHECK-NEXT: [[IV_INC:%.*]] = add i32 [[IV]], 1
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; CHECK-NEXT: [[BE_TAKEN:%.*]] = icmp ne i32 [[IV_INC]], 1
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; CHECK-NEXT: br i1 [[BE_TAKEN]], label [[LOOP_LOOP_CRIT_EDGE:%.*]], label [[EXIT:%.*]]
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; CHECK: loop.loop_crit_edge:
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; CHECK-NEXT: unreachable
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; CHECK: exit:
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; CHECK-NEXT: ret void
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;
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entry:
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br label %loop
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loop:
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%iv = phi i32 [ 0, %entry], [ %iv.inc, %loop ]
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store i32 0, i32* @G
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%iv.inc = add i32 %iv, 1
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%be_taken = icmp ne i32 %iv.inc, 1
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br i1 %be_taken, label %loop, label %exit
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exit:
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ret void
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}
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define void @test_early_exit() {
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; CHECK-LABEL: @test_early_exit(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[LOOP:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ]
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; CHECK-NEXT: store i32 0, i32* @G, align 4
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; CHECK-NEXT: [[IV_INC:%.*]] = add i32 [[IV]], 1
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; CHECK-NEXT: [[BE_TAKEN:%.*]] = icmp ne i32 [[IV_INC]], 1
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; CHECK-NEXT: br i1 [[BE_TAKEN]], label [[LATCH:%.*]], label [[EXIT:%.*]]
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; CHECK: latch:
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; CHECK-NEXT: br label [[LATCH_SPLIT:%.*]]
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; CHECK: latch.split:
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; CHECK-NEXT: unreachable
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; CHECK: exit:
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; CHECK-NEXT: ret void
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;
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entry:
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br label %loop
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loop:
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%iv = phi i32 [ 0, %entry], [ %iv.inc, %latch ]
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store i32 0, i32* @G
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%iv.inc = add i32 %iv, 1
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%be_taken = icmp ne i32 %iv.inc, 1
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br i1 %be_taken, label %latch, label %exit
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latch:
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br label %loop
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exit:
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ret void
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}
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define void @test_multi_exit1() {
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; CHECK-LABEL: @test_multi_exit1(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[LOOP:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ]
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; CHECK-NEXT: store i32 0, i32* @G, align 4
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; CHECK-NEXT: [[IV_INC:%.*]] = add i32 [[IV]], 1
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; CHECK-NEXT: [[BE_TAKEN:%.*]] = icmp ne i32 [[IV_INC]], 1
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; CHECK-NEXT: br i1 [[BE_TAKEN]], label [[LATCH:%.*]], label [[EXIT:%.*]]
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; CHECK: latch:
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; CHECK-NEXT: store i32 1, i32* @G, align 4
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; CHECK-NEXT: [[COND2:%.*]] = icmp ult i32 [[IV_INC]], 30
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; CHECK-NEXT: br i1 [[COND2]], label [[LATCH_LOOP_CRIT_EDGE:%.*]], label [[EXIT]]
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; CHECK: latch.loop_crit_edge:
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; CHECK-NEXT: unreachable
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; CHECK: exit:
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; CHECK-NEXT: ret void
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;
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entry:
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br label %loop
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loop:
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%iv = phi i32 [ 0, %entry], [ %iv.inc, %latch ]
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store i32 0, i32* @G
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%iv.inc = add i32 %iv, 1
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%be_taken = icmp ne i32 %iv.inc, 1
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br i1 %be_taken, label %latch, label %exit
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latch:
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store i32 1, i32* @G
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%cond2 = icmp ult i32 %iv.inc, 30
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br i1 %cond2, label %loop, label %exit
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exit:
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ret void
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}
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define void @test_multi_exit2() {
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; CHECK-LABEL: @test_multi_exit2(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[LOOP:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: store i32 0, i32* @G, align 4
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; CHECK-NEXT: br i1 true, label [[LATCH:%.*]], label [[EXIT:%.*]]
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; CHECK: latch:
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; CHECK-NEXT: store i32 1, i32* @G, align 4
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; CHECK-NEXT: br i1 false, label [[LATCH_LOOP_CRIT_EDGE:%.*]], label [[EXIT]]
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; CHECK: latch.loop_crit_edge:
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; CHECK-NEXT: unreachable
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; CHECK: exit:
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; CHECK-NEXT: ret void
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;
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entry:
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br label %loop
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loop:
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store i32 0, i32* @G
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br i1 true, label %latch, label %exit
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latch:
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store i32 1, i32* @G
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br i1 false, label %loop, label %exit
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exit:
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ret void
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}
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; TODO: SCEV seems not to recognize this as a zero btc loop
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define void @test_multi_exit3(i1 %cond1) {
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; CHECK-LABEL: @test_multi_exit3(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[LOOP:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_INC:%.*]], [[LATCH:%.*]] ]
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; CHECK-NEXT: store i32 0, i32* @G, align 4
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; CHECK-NEXT: br i1 [[COND1:%.*]], label [[LATCH]], label [[EXIT:%.*]]
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; CHECK: latch:
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; CHECK-NEXT: store i32 1, i32* @G, align 4
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; CHECK-NEXT: [[IV_INC]] = add i32 [[IV]], 1
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; CHECK-NEXT: [[BE_TAKEN:%.*]] = icmp ne i32 [[IV_INC]], 1
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; CHECK-NEXT: br i1 [[BE_TAKEN]], label [[LOOP]], label [[EXIT]]
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; CHECK: exit:
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; CHECK-NEXT: ret void
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;
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entry:
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br label %loop
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loop:
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%iv = phi i32 [ 0, %entry], [ %iv.inc, %latch ]
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store i32 0, i32* @G
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br i1 %cond1, label %latch, label %exit
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latch:
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store i32 1, i32* @G
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%iv.inc = add i32 %iv, 1
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%be_taken = icmp ne i32 %iv.inc, 1
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br i1 %be_taken, label %loop, label %exit
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exit:
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ret void
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}
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; Subtle - This is either zero btc, or infinite, thus, can't break
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; backedge
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define void @test_multi_exit4(i1 %cond1, i1 %cond2) {
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; CHECK-LABEL: @test_multi_exit4(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[LOOP:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: store i32 0, i32* @G, align 4
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; CHECK-NEXT: br i1 [[COND1:%.*]], label [[LATCH:%.*]], label [[EXIT:%.*]]
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; CHECK: latch:
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; CHECK-NEXT: store i32 1, i32* @G, align 4
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; CHECK-NEXT: br i1 [[COND2:%.*]], label [[LOOP]], label [[EXIT]]
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; CHECK: exit:
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; CHECK-NEXT: ret void
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;
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entry:
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br label %loop
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loop:
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store i32 0, i32* @G
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br i1 %cond1, label %latch, label %exit
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latch:
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store i32 1, i32* @G
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br i1 %cond2, label %loop, label %exit
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exit:
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ret void
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}
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; A simple case with multiple exit blocks
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define void @test_multi_exit5() {
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; CHECK-LABEL: @test_multi_exit5(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[LOOP:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: store i32 0, i32* @G, align 4
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; CHECK-NEXT: br i1 true, label [[LATCH:%.*]], label [[EXIT1:%.*]]
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; CHECK: latch:
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; CHECK-NEXT: store i32 1, i32* @G, align 4
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; CHECK-NEXT: br i1 false, label [[LATCH_LOOP_CRIT_EDGE:%.*]], label [[EXIT2:%.*]]
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; CHECK: latch.loop_crit_edge:
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; CHECK-NEXT: unreachable
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; CHECK: exit1:
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; CHECK-NEXT: ret void
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; CHECK: exit2:
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; CHECK-NEXT: ret void
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;
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entry:
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br label %loop
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loop:
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store i32 0, i32* @G
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br i1 true, label %latch, label %exit1
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latch:
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store i32 1, i32* @G
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br i1 false, label %loop, label %exit2
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exit1:
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ret void
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exit2:
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ret void
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}
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define void @test_live_inner() {
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; CHECK-LABEL: @test_live_inner(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[LOOP:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: store i32 0, i32* @G, align 4
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; CHECK-NEXT: br label [[INNER:%.*]]
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; CHECK: inner:
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; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[LOOP]] ], [ [[IV_INC:%.*]], [[INNER]] ]
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; CHECK-NEXT: store i32 [[IV]], i32* @G, align 4
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; CHECK-NEXT: [[IV_INC]] = add i32 [[IV]], 1
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; CHECK-NEXT: [[CND:%.*]] = icmp ult i32 [[IV_INC]], 200
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; CHECK-NEXT: br i1 [[CND]], label [[INNER]], label [[LATCH:%.*]]
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; CHECK: latch:
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; CHECK-NEXT: br i1 false, label [[LATCH_LOOP_CRIT_EDGE:%.*]], label [[EXIT:%.*]]
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; CHECK: latch.loop_crit_edge:
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; CHECK-NEXT: unreachable
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; CHECK: exit:
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; CHECK-NEXT: ret void
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;
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entry:
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br label %loop
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loop:
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store i32 0, i32* @G
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br label %inner
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inner:
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%iv = phi i32 [0, %loop], [%iv.inc, %inner]
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store i32 %iv, i32* @G
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%iv.inc = add i32 %iv, 1
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%cnd = icmp ult i32 %iv.inc, 200
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br i1 %cnd, label %inner, label %latch
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latch:
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br i1 false, label %loop, label %exit
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exit:
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ret void
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}
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define void @test_live_outer() {
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; CHECK-LABEL: @test_live_outer(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[LOOP:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_INC:%.*]], [[LATCH:%.*]] ]
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; CHECK-NEXT: br label [[INNER:%.*]]
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; CHECK: inner:
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; CHECK-NEXT: store i32 0, i32* @G, align 4
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; CHECK-NEXT: br i1 false, label [[INNER_INNER_CRIT_EDGE:%.*]], label [[LATCH]]
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; CHECK: inner.inner_crit_edge:
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; CHECK-NEXT: unreachable
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; CHECK: latch:
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; CHECK-NEXT: store i32 [[IV]], i32* @G, align 4
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; CHECK-NEXT: [[IV_INC]] = add i32 [[IV]], 1
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; CHECK-NEXT: [[CND:%.*]] = icmp ult i32 [[IV_INC]], 200
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; CHECK-NEXT: br i1 [[CND]], label [[LOOP]], label [[EXIT:%.*]]
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; CHECK: exit:
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; CHECK-NEXT: ret void
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;
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entry:
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br label %loop
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loop:
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%iv = phi i32 [0, %entry], [%iv.inc, %latch]
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br label %inner
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inner:
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store i32 0, i32* @G
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br i1 false, label %inner, label %latch
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latch:
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store i32 %iv, i32* @G
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%iv.inc = add i32 %iv, 1
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%cnd = icmp ult i32 %iv.inc, 200
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br i1 %cnd, label %loop, label %exit
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exit:
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ret void
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}
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; Key point is that inner_latch drops out of the outer loop when
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; the inner loop is deleted, and thus the lcssa phi needs to be
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; in the inner_latch block to preserve LCSSA. We either have to
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; insert the LCSSA phi, or not break the inner backedge.
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define void @loop_nest_lcssa() {
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; CHECK-LABEL: @loop_nest_lcssa(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[TMP0:%.*]] = add i32 1, 2
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; CHECK-NEXT: br label [[OUTER_HEADER:%.*]]
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; CHECK: outer_header:
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; CHECK-NEXT: br label [[INNER_HEADER:%.*]]
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; CHECK: inner_header:
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; CHECK-NEXT: br i1 false, label [[INNER_LATCH:%.*]], label [[OUTER_LATCH:%.*]]
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|
; CHECK: inner_latch:
|
||
|
|
; CHECK-NEXT: [[DOTLCSSA:%.*]] = phi i32 [ [[TMP0]], [[INNER_HEADER]] ]
|
||
|
|
; CHECK-NEXT: br i1 false, label [[INNER_LATCH_INNER_HEADER_CRIT_EDGE:%.*]], label [[LOOPEXIT:%.*]]
|
||
|
|
; CHECK: inner_latch.inner_header_crit_edge:
|
||
|
|
; CHECK-NEXT: unreachable
|
||
|
|
; CHECK: outer_latch:
|
||
|
|
; CHECK-NEXT: br label [[OUTER_HEADER]]
|
||
|
|
; CHECK: loopexit:
|
||
|
|
; CHECK-NEXT: [[DOTLCSSA32:%.*]] = phi i32 [ [[DOTLCSSA]], [[INNER_LATCH]] ]
|
||
|
|
; CHECK-NEXT: unreachable
|
||
|
|
;
|
||
|
|
entry:
|
||
|
|
br label %outer_header
|
||
|
|
|
||
|
|
outer_header:
|
||
|
|
%0 = add i32 1, 2
|
||
|
|
br label %inner_header
|
||
|
|
|
||
|
|
inner_header:
|
||
|
|
br i1 false, label %inner_latch, label %outer_latch
|
||
|
|
|
||
|
|
inner_latch:
|
||
|
|
br i1 false, label %inner_header, label %loopexit
|
||
|
|
|
||
|
|
outer_latch:
|
||
|
|
br label %outer_header
|
||
|
|
|
||
|
|
loopexit:
|
||
|
|
%.lcssa32 = phi i32 [ %0, %inner_latch ]
|
||
|
|
unreachable
|
||
|
|
}
|