345 lines
15 KiB
LLVM
345 lines
15 KiB
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -S < %s -basic-aa -gvn -dce | FileCheck %s
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; Analyze Load from clobbering Load.
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define <vscale x 4 x i32> @load_store_clobber_load(<vscale x 4 x i32> *%p) {
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; CHECK-LABEL: @load_store_clobber_load(
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; CHECK-NEXT: [[LOAD1:%.*]] = load <vscale x 4 x i32>, <vscale x 4 x i32>* [[P:%.*]], align 16
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; CHECK-NEXT: store <vscale x 4 x i32> zeroinitializer, <vscale x 4 x i32>* undef, align 16
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; CHECK-NEXT: [[ADD:%.*]] = add <vscale x 4 x i32> [[LOAD1]], [[LOAD1]]
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; CHECK-NEXT: ret <vscale x 4 x i32> [[ADD]]
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;
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%load1 = load <vscale x 4 x i32>, <vscale x 4 x i32>* %p
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store <vscale x 4 x i32> zeroinitializer, <vscale x 4 x i32>* undef
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%load2 = load <vscale x 4 x i32>, <vscale x 4 x i32>* %p ; <- load to be eliminated
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%add = add <vscale x 4 x i32> %load1, %load2
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ret <vscale x 4 x i32> %add
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}
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define <vscale x 4 x i32> @load_store_clobber_load_mayalias(<vscale x 4 x i32>* %p, <vscale x 4 x i32>* %p2) {
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; CHECK-LABEL: @load_store_clobber_load_mayalias(
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; CHECK-NEXT: [[LOAD1:%.*]] = load <vscale x 4 x i32>, <vscale x 4 x i32>* [[P:%.*]], align 16
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; CHECK-NEXT: store <vscale x 4 x i32> zeroinitializer, <vscale x 4 x i32>* [[P2:%.*]], align 16
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; CHECK-NEXT: [[LOAD2:%.*]] = load <vscale x 4 x i32>, <vscale x 4 x i32>* [[P]], align 16
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; CHECK-NEXT: [[SUB:%.*]] = sub <vscale x 4 x i32> [[LOAD1]], [[LOAD2]]
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; CHECK-NEXT: ret <vscale x 4 x i32> [[SUB]]
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;
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%load1 = load <vscale x 4 x i32>, <vscale x 4 x i32>* %p
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store <vscale x 4 x i32> zeroinitializer, <vscale x 4 x i32>* %p2
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%load2 = load <vscale x 4 x i32>, <vscale x 4 x i32>* %p
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%sub = sub <vscale x 4 x i32> %load1, %load2
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ret <vscale x 4 x i32> %sub
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}
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define <vscale x 4 x i32> @load_store_clobber_load_noalias(<vscale x 4 x i32>* noalias %p, <vscale x 4 x i32>* noalias %p2) {
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; CHECK-LABEL: @load_store_clobber_load_noalias(
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; CHECK-NEXT: [[LOAD1:%.*]] = load <vscale x 4 x i32>, <vscale x 4 x i32>* [[P:%.*]], align 16
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; CHECK-NEXT: store <vscale x 4 x i32> zeroinitializer, <vscale x 4 x i32>* [[P2:%.*]], align 16
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; CHECK-NEXT: [[ADD:%.*]] = add <vscale x 4 x i32> [[LOAD1]], [[LOAD1]]
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; CHECK-NEXT: ret <vscale x 4 x i32> [[ADD]]
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;
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%load1 = load <vscale x 4 x i32>, <vscale x 4 x i32>* %p
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store <vscale x 4 x i32> zeroinitializer, <vscale x 4 x i32>* %p2
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%load2 = load <vscale x 4 x i32>, <vscale x 4 x i32>* %p ; <- load to be eliminated
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%add = add <vscale x 4 x i32> %load1, %load2
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ret <vscale x 4 x i32> %add
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}
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; TODO: BasicAA return MayAlias for %gep1,%gep2, could improve as MustAlias.
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define i32 @load_clobber_load_gep1(<vscale x 4 x i32>* %p) {
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; CHECK-LABEL: @load_clobber_load_gep1(
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; CHECK-NEXT: [[GEP1:%.*]] = getelementptr <vscale x 4 x i32>, <vscale x 4 x i32>* [[P:%.*]], i64 0, i64 1
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; CHECK-NEXT: [[LOAD1:%.*]] = load i32, i32* [[GEP1]], align 4
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; CHECK-NEXT: [[P2:%.*]] = bitcast <vscale x 4 x i32>* [[P]] to i32*
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; CHECK-NEXT: [[GEP2:%.*]] = getelementptr i32, i32* [[P2]], i64 1
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; CHECK-NEXT: [[LOAD2:%.*]] = load i32, i32* [[GEP2]], align 4
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; CHECK-NEXT: [[ADD:%.*]] = add i32 [[LOAD1]], [[LOAD2]]
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; CHECK-NEXT: ret i32 [[ADD]]
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;
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%gep1 = getelementptr <vscale x 4 x i32>, <vscale x 4 x i32>* %p, i64 0, i64 1
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%load1 = load i32, i32* %gep1
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%p2 = bitcast <vscale x 4 x i32>* %p to i32*
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%gep2 = getelementptr i32, i32* %p2, i64 1
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%load2 = load i32, i32* %gep2 ; <- load could be eliminated
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%add = add i32 %load1, %load2
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ret i32 %add
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}
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define i32 @load_clobber_load_gep2(<vscale x 4 x i32>* %p) {
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; CHECK-LABEL: @load_clobber_load_gep2(
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; CHECK-NEXT: [[GEP1:%.*]] = getelementptr <vscale x 4 x i32>, <vscale x 4 x i32>* [[P:%.*]], i64 1, i64 0
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; CHECK-NEXT: [[LOAD1:%.*]] = load i32, i32* [[GEP1]], align 4
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; CHECK-NEXT: [[P2:%.*]] = bitcast <vscale x 4 x i32>* [[P]] to i32*
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; CHECK-NEXT: [[GEP2:%.*]] = getelementptr i32, i32* [[P2]], i64 4
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; CHECK-NEXT: [[LOAD2:%.*]] = load i32, i32* [[GEP2]], align 4
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; CHECK-NEXT: [[ADD:%.*]] = add i32 [[LOAD1]], [[LOAD2]]
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; CHECK-NEXT: ret i32 [[ADD]]
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;
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%gep1 = getelementptr <vscale x 4 x i32>, <vscale x 4 x i32>* %p, i64 1, i64 0
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%load1 = load i32, i32* %gep1
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%p2 = bitcast <vscale x 4 x i32>* %p to i32*
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%gep2 = getelementptr i32, i32* %p2, i64 4
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%load2 = load i32, i32* %gep2 ; <- can not determine at compile-time if %load1 and %load2 are same addr
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%add = add i32 %load1, %load2
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ret i32 %add
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}
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; TODO: BasicAA return MayAlias for %gep1,%gep2, could improve as MustAlias.
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define i32 @load_clobber_load_gep3(<vscale x 4 x i32>* %p) {
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; CHECK-LABEL: @load_clobber_load_gep3(
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; CHECK-NEXT: [[GEP1:%.*]] = getelementptr <vscale x 4 x i32>, <vscale x 4 x i32>* [[P:%.*]], i64 1, i64 0
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; CHECK-NEXT: [[LOAD1:%.*]] = load i32, i32* [[GEP1]], align 4
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; CHECK-NEXT: [[P2:%.*]] = bitcast <vscale x 4 x i32>* [[P]] to <vscale x 4 x float>*
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; CHECK-NEXT: [[GEP2:%.*]] = getelementptr <vscale x 4 x float>, <vscale x 4 x float>* [[P2]], i64 1, i64 0
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; CHECK-NEXT: [[LOAD2:%.*]] = load float, float* [[GEP2]], align 4
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; CHECK-NEXT: [[CAST:%.*]] = bitcast float [[LOAD2]] to i32
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; CHECK-NEXT: [[ADD:%.*]] = add i32 [[LOAD1]], [[CAST]]
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; CHECK-NEXT: ret i32 [[ADD]]
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;
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%gep1 = getelementptr <vscale x 4 x i32>, <vscale x 4 x i32>* %p, i64 1, i64 0
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%load1 = load i32, i32* %gep1
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%p2 = bitcast <vscale x 4 x i32>* %p to <vscale x 4 x float>*
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%gep2 = getelementptr <vscale x 4 x float>, <vscale x 4 x float>* %p2, i64 1, i64 0
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%load2 = load float, float* %gep2 ; <- load could be eliminated
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%cast = bitcast float %load2 to i32
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%add = add i32 %load1, %cast
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ret i32 %add
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}
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define <vscale x 4 x i32> @load_clobber_load_fence(<vscale x 4 x i32>* %p) {
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; CHECK-LABEL: @load_clobber_load_fence(
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; CHECK-NEXT: [[LOAD1:%.*]] = load <vscale x 4 x i32>, <vscale x 4 x i32>* [[P:%.*]], align 16
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; CHECK-NEXT: call void asm "", "~{memory}"()
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; CHECK-NEXT: [[LOAD2:%.*]] = load <vscale x 4 x i32>, <vscale x 4 x i32>* [[P]], align 16
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; CHECK-NEXT: [[SUB:%.*]] = sub <vscale x 4 x i32> [[LOAD1]], [[LOAD2]]
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; CHECK-NEXT: ret <vscale x 4 x i32> [[SUB]]
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;
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%load1 = load <vscale x 4 x i32>, <vscale x 4 x i32>* %p
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call void asm "", "~{memory}"()
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%load2 = load <vscale x 4 x i32>, <vscale x 4 x i32>* %p
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%sub = sub <vscale x 4 x i32> %load1, %load2
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ret <vscale x 4 x i32> %sub
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}
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define <vscale x 4 x i32> @load_clobber_load_sideeffect(<vscale x 4 x i32>* %p) {
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; CHECK-LABEL: @load_clobber_load_sideeffect(
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; CHECK-NEXT: [[LOAD1:%.*]] = load <vscale x 4 x i32>, <vscale x 4 x i32>* [[P:%.*]], align 16
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; CHECK-NEXT: call void asm sideeffect "", ""()
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; CHECK-NEXT: [[LOAD2:%.*]] = load <vscale x 4 x i32>, <vscale x 4 x i32>* [[P]], align 16
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; CHECK-NEXT: [[ADD:%.*]] = add <vscale x 4 x i32> [[LOAD1]], [[LOAD2]]
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; CHECK-NEXT: ret <vscale x 4 x i32> [[ADD]]
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;
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%load1 = load <vscale x 4 x i32>, <vscale x 4 x i32>* %p
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call void asm sideeffect "", ""()
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%load2 = load <vscale x 4 x i32>, <vscale x 4 x i32>* %p
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%add = add <vscale x 4 x i32> %load1, %load2
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ret <vscale x 4 x i32> %add
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}
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; Analyze Load from clobbering Store.
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define <vscale x 4 x i32> @store_forward_to_load(<vscale x 4 x i32>* %p) {
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; CHECK-LABEL: @store_forward_to_load(
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; CHECK-NEXT: store <vscale x 4 x i32> zeroinitializer, <vscale x 4 x i32>* [[P:%.*]], align 16
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; CHECK-NEXT: ret <vscale x 4 x i32> zeroinitializer
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;
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store <vscale x 4 x i32> zeroinitializer, <vscale x 4 x i32>* %p
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%load = load <vscale x 4 x i32>, <vscale x 4 x i32>* %p
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ret <vscale x 4 x i32> %load
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}
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define <vscale x 4 x i32> @store_forward_to_load_sideeffect(<vscale x 4 x i32>* %p) {
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; CHECK-LABEL: @store_forward_to_load_sideeffect(
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; CHECK-NEXT: store <vscale x 4 x i32> zeroinitializer, <vscale x 4 x i32>* [[P:%.*]], align 16
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; CHECK-NEXT: call void asm sideeffect "", ""()
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; CHECK-NEXT: [[LOAD:%.*]] = load <vscale x 4 x i32>, <vscale x 4 x i32>* [[P]], align 16
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; CHECK-NEXT: ret <vscale x 4 x i32> [[LOAD]]
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;
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store <vscale x 4 x i32> zeroinitializer, <vscale x 4 x i32>* %p
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call void asm sideeffect "", ""()
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%load = load <vscale x 4 x i32>, <vscale x 4 x i32>* %p
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ret <vscale x 4 x i32> %load
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}
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define i32 @store_clobber_load() {
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; CHECK-LABEL: @store_clobber_load(
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; CHECK-NEXT: [[ALLOC:%.*]] = alloca <vscale x 4 x i32>
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; CHECK-NEXT: store <vscale x 4 x i32> undef, <vscale x 4 x i32>* [[ALLOC]], align 16
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; CHECK-NEXT: [[PTR:%.*]] = getelementptr <vscale x 4 x i32>, <vscale x 4 x i32>* [[ALLOC]], i32 0, i32 1
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; CHECK-NEXT: [[LOAD:%.*]] = load i32, i32* [[PTR]], align 4
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; CHECK-NEXT: ret i32 [[LOAD]]
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;
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%alloc = alloca <vscale x 4 x i32>
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store <vscale x 4 x i32> undef, <vscale x 4 x i32>* %alloc
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%ptr = getelementptr <vscale x 4 x i32>, <vscale x 4 x i32>* %alloc, i32 0, i32 1
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%load = load i32, i32* %ptr
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ret i32 %load
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}
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; Analyze Load from clobbering MemInst.
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declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i1)
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define i32 @memset_clobber_load(<vscale x 4 x i32> *%p) {
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; CHECK-LABEL: @memset_clobber_load(
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; CHECK-NEXT: [[CONV:%.*]] = bitcast <vscale x 4 x i32>* [[P:%.*]] to i8*
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; CHECK-NEXT: tail call void @llvm.memset.p0i8.i64(i8* [[CONV]], i8 1, i64 200, i1 false)
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; CHECK-NEXT: ret i32 16843009
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;
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%conv = bitcast <vscale x 4 x i32>* %p to i8*
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tail call void @llvm.memset.p0i8.i64(i8* %conv, i8 1, i64 200, i1 false)
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%gep = getelementptr <vscale x 4 x i32>, <vscale x 4 x i32>* %p, i64 0, i64 5
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%load = load i32, i32* %gep
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ret i32 %load
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}
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define i32 @memset_clobber_load_vscaled_base(<vscale x 4 x i32> *%p) {
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; CHECK-LABEL: @memset_clobber_load_vscaled_base(
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; CHECK-NEXT: [[CONV:%.*]] = bitcast <vscale x 4 x i32>* [[P:%.*]] to i8*
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; CHECK-NEXT: tail call void @llvm.memset.p0i8.i64(i8* [[CONV]], i8 1, i64 200, i1 false)
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; CHECK-NEXT: [[GEP:%.*]] = getelementptr <vscale x 4 x i32>, <vscale x 4 x i32>* [[P]], i64 1, i64 1
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; CHECK-NEXT: [[LOAD:%.*]] = load i32, i32* [[GEP]], align 4
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; CHECK-NEXT: ret i32 [[LOAD]]
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;
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%conv = bitcast <vscale x 4 x i32>* %p to i8*
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tail call void @llvm.memset.p0i8.i64(i8* %conv, i8 1, i64 200, i1 false)
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%gep = getelementptr <vscale x 4 x i32>, <vscale x 4 x i32>* %p, i64 1, i64 1
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%load = load i32, i32* %gep
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ret i32 %load
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}
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define i32 @memset_clobber_load_nonconst_index(<vscale x 4 x i32> *%p, i64 %idx1, i64 %idx2) {
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; CHECK-LABEL: @memset_clobber_load_nonconst_index(
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; CHECK-NEXT: [[CONV:%.*]] = bitcast <vscale x 4 x i32>* [[P:%.*]] to i8*
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; CHECK-NEXT: tail call void @llvm.memset.p0i8.i64(i8* [[CONV]], i8 1, i64 200, i1 false)
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; CHECK-NEXT: [[GEP:%.*]] = getelementptr <vscale x 4 x i32>, <vscale x 4 x i32>* [[P]], i64 [[IDX1:%.*]], i64 [[IDX2:%.*]]
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; CHECK-NEXT: [[LOAD:%.*]] = load i32, i32* [[GEP]], align 4
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; CHECK-NEXT: ret i32 [[LOAD]]
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;
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%conv = bitcast <vscale x 4 x i32>* %p to i8*
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tail call void @llvm.memset.p0i8.i64(i8* %conv, i8 1, i64 200, i1 false)
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%gep = getelementptr <vscale x 4 x i32>, <vscale x 4 x i32>* %p, i64 %idx1, i64 %idx2
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%load = load i32, i32* %gep
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ret i32 %load
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}
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; Load elimination across BBs
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define <vscale x 4 x i32>* @load_from_alloc_replaced_with_undef() {
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; CHECK-LABEL: @load_from_alloc_replaced_with_undef(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[A:%.*]] = alloca <vscale x 4 x i32>
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; CHECK-NEXT: br i1 undef, label [[IF_END:%.*]], label [[IF_THEN:%.*]]
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; CHECK: if.then:
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; CHECK-NEXT: store <vscale x 4 x i32> zeroinitializer, <vscale x 4 x i32>* [[A]], align 16
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; CHECK-NEXT: br label [[IF_END]]
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; CHECK: if.end:
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; CHECK-NEXT: ret <vscale x 4 x i32>* [[A]]
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;
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entry:
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%a = alloca <vscale x 4 x i32>
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%gep = getelementptr <vscale x 4 x i32>, <vscale x 4 x i32>* %a, i64 0, i64 1
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%load = load i32, i32* %gep ; <- load to be eliminated
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%tobool = icmp eq i32 %load, 0 ; <- icmp to be eliminated
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br i1 %tobool, label %if.end, label %if.then
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if.then:
|
||
|
|
store <vscale x 4 x i32> zeroinitializer, <vscale x 4 x i32>* %a
|
||
|
|
br label %if.end
|
||
|
|
|
||
|
|
if.end:
|
||
|
|
ret <vscale x 4 x i32>* %a
|
||
|
|
}
|
||
|
|
|
||
|
|
define i32 @redundant_load_elimination_1(<vscale x 4 x i32>* %p) {
|
||
|
|
; CHECK-LABEL: @redundant_load_elimination_1(
|
||
|
|
; CHECK-NEXT: entry:
|
||
|
|
; CHECK-NEXT: [[GEP:%.*]] = getelementptr <vscale x 4 x i32>, <vscale x 4 x i32>* [[P:%.*]], i64 1, i64 1
|
||
|
|
; CHECK-NEXT: [[LOAD1:%.*]] = load i32, i32* [[GEP]], align 4
|
||
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[LOAD1]], 0
|
||
|
|
; CHECK-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
|
||
|
|
; CHECK: if.then:
|
||
|
|
; CHECK-NEXT: br label [[IF_END]]
|
||
|
|
; CHECK: if.end:
|
||
|
|
; CHECK-NEXT: ret i32 [[LOAD1]]
|
||
|
|
;
|
||
|
|
entry:
|
||
|
|
%gep = getelementptr <vscale x 4 x i32>, <vscale x 4 x i32>* %p, i64 1, i64 1
|
||
|
|
%load1 = load i32, i32* %gep
|
||
|
|
%cmp = icmp eq i32 %load1, 0
|
||
|
|
br i1 %cmp, label %if.then, label %if.end
|
||
|
|
|
||
|
|
if.then:
|
||
|
|
%load2 = load i32, i32* %gep ; <- load to be eliminated
|
||
|
|
%add = add i32 %load1, %load2
|
||
|
|
br label %if.end
|
||
|
|
|
||
|
|
if.end:
|
||
|
|
%result = phi i32 [ %add, %if.then ], [ %load1, %entry ]
|
||
|
|
ret i32 %result
|
||
|
|
}
|
||
|
|
|
||
|
|
; TODO: BasicAA return MayAlias for %gep1,%gep2, could improve as NoAlias.
|
||
|
|
define void @redundant_load_elimination_2(i1 %c, <vscale x 4 x i32>* %p, i32* %q, <vscale x 4 x i32> %v) {
|
||
|
|
; CHECK-LABEL: @redundant_load_elimination_2(
|
||
|
|
; CHECK-NEXT: entry:
|
||
|
|
; CHECK-NEXT: [[GEP1:%.*]] = getelementptr <vscale x 4 x i32>, <vscale x 4 x i32>* [[P:%.*]], i64 1, i64 1
|
||
|
|
; CHECK-NEXT: store i32 0, i32* [[GEP1]], align 4
|
||
|
|
; CHECK-NEXT: [[GEP2:%.*]] = getelementptr <vscale x 4 x i32>, <vscale x 4 x i32>* [[P]], i64 1, i64 0
|
||
|
|
; CHECK-NEXT: store i32 1, i32* [[GEP2]], align 4
|
||
|
|
; CHECK-NEXT: br i1 [[C:%.*]], label [[IF_ELSE:%.*]], label [[IF_THEN:%.*]]
|
||
|
|
; CHECK: if.then:
|
||
|
|
; CHECK-NEXT: [[T:%.*]] = load i32, i32* [[GEP1]], align 4
|
||
|
|
; CHECK-NEXT: store i32 [[T]], i32* [[Q:%.*]], align 4
|
||
|
|
; CHECK-NEXT: ret void
|
||
|
|
; CHECK: if.else:
|
||
|
|
; CHECK-NEXT: ret void
|
||
|
|
;
|
||
|
|
entry:
|
||
|
|
%gep1 = getelementptr <vscale x 4 x i32>, <vscale x 4 x i32>* %p, i64 1, i64 1
|
||
|
|
store i32 0, i32* %gep1
|
||
|
|
%gep2 = getelementptr <vscale x 4 x i32>, <vscale x 4 x i32>* %p, i64 1, i64 0
|
||
|
|
store i32 1, i32* %gep2
|
||
|
|
br i1 %c, label %if.else, label %if.then
|
||
|
|
|
||
|
|
if.then:
|
||
|
|
%t = load i32, i32* %gep1 ; <- load could be eliminated
|
||
|
|
store i32 %t, i32* %q
|
||
|
|
ret void
|
||
|
|
|
||
|
|
if.else:
|
||
|
|
ret void
|
||
|
|
}
|
||
|
|
|
||
|
|
; TODO: load in if.then could have been eliminated
|
||
|
|
define void @missing_load_elimination(i1 %c, <vscale x 4 x i32>* %p, <vscale x 4 x i32>* %q, <vscale x 4 x i32> %v) {
|
||
|
|
; CHECK-LABEL: @missing_load_elimination(
|
||
|
|
; CHECK-NEXT: entry:
|
||
|
|
; CHECK-NEXT: store <vscale x 4 x i32> zeroinitializer, <vscale x 4 x i32>* [[P:%.*]], align 16
|
||
|
|
; CHECK-NEXT: [[P1:%.*]] = getelementptr <vscale x 4 x i32>, <vscale x 4 x i32>* [[P]], i64 1
|
||
|
|
; CHECK-NEXT: store <vscale x 4 x i32> [[V:%.*]], <vscale x 4 x i32>* [[P1]], align 16
|
||
|
|
; CHECK-NEXT: br i1 [[C:%.*]], label [[IF_ELSE:%.*]], label [[IF_THEN:%.*]]
|
||
|
|
; CHECK: if.then:
|
||
|
|
; CHECK-NEXT: [[T:%.*]] = load <vscale x 4 x i32>, <vscale x 4 x i32>* [[P]], align 16
|
||
|
|
; CHECK-NEXT: store <vscale x 4 x i32> [[T]], <vscale x 4 x i32>* [[Q:%.*]], align 16
|
||
|
|
; CHECK-NEXT: ret void
|
||
|
|
; CHECK: if.else:
|
||
|
|
; CHECK-NEXT: ret void
|
||
|
|
;
|
||
|
|
entry:
|
||
|
|
store <vscale x 4 x i32> zeroinitializer, <vscale x 4 x i32>* %p
|
||
|
|
%p1 = getelementptr <vscale x 4 x i32>, <vscale x 4 x i32>* %p, i64 1
|
||
|
|
store <vscale x 4 x i32> %v, <vscale x 4 x i32>* %p1
|
||
|
|
br i1 %c, label %if.else, label %if.then
|
||
|
|
|
||
|
|
if.then:
|
||
|
|
%t = load <vscale x 4 x i32>, <vscale x 4 x i32>* %p ; load could be eliminated
|
||
|
|
store <vscale x 4 x i32> %t, <vscale x 4 x i32>* %q
|
||
|
|
ret void
|
||
|
|
|
||
|
|
if.else:
|
||
|
|
ret void
|
||
|
|
}
|