96 lines
2.1 KiB
LLVM
96 lines
2.1 KiB
LLVM
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;; AArch64 is arbitralily chosen as a 32/64-bit RISC representative to show the transform in all tests.
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; RUN: opt < %s -codegenprepare -S -mtriple=aarch64-unknown-unknown | FileCheck %s --check-prefix=ARM64
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; AArch64 widens to 32-bit.
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define i32 @widen_switch_i16(i32 %a) {
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entry:
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%trunc = trunc i32 %a to i16
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switch i16 %trunc, label %sw.default [
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i16 1, label %sw.bb0
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i16 -1, label %sw.bb1
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]
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sw.bb0:
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br label %return
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sw.bb1:
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br label %return
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sw.default:
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br label %return
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return:
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%retval = phi i32 [ -1, %sw.default ], [ 0, %sw.bb0 ], [ 1, %sw.bb1 ]
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ret i32 %retval
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; ARM64-LABEL: @widen_switch_i16(
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; ARM64: %0 = zext i16 %trunc to i32
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; ARM64-NEXT: switch i32 %0, label %sw.default [
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; ARM64-NEXT: i32 1, label %sw.bb0
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; ARM64-NEXT: i32 65535, label %sw.bb1
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}
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; Widen to 32-bit from a smaller, non-native type.
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define i32 @widen_switch_i17(i32 %a) {
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entry:
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%trunc = trunc i32 %a to i17
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switch i17 %trunc, label %sw.default [
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i17 10, label %sw.bb0
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i17 -1, label %sw.bb1
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]
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sw.bb0:
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br label %return
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sw.bb1:
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br label %return
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sw.default:
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br label %return
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return:
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%retval = phi i32 [ -1, %sw.default ], [ 0, %sw.bb0 ], [ 1, %sw.bb1 ]
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ret i32 %retval
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; ARM64-LABEL: @widen_switch_i17(
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; ARM64: %0 = zext i17 %trunc to i32
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; ARM64-NEXT: switch i32 %0, label %sw.default [
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; ARM64-NEXT: i32 10, label %sw.bb0
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; ARM64-NEXT: i32 131071, label %sw.bb1
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}
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; If the switch condition is a sign-extended function argument, then the
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; condition and cases should be sign-extended rather than zero-extended
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; because the sign-extension can be optimized away.
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define i32 @widen_switch_i16_sext(i2 signext %a) {
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entry:
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switch i2 %a, label %sw.default [
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i2 1, label %sw.bb0
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i2 -1, label %sw.bb1
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]
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sw.bb0:
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br label %return
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sw.bb1:
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br label %return
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sw.default:
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br label %return
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return:
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%retval = phi i32 [ -1, %sw.default ], [ 0, %sw.bb0 ], [ 1, %sw.bb1 ]
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ret i32 %retval
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; ARM64-LABEL: @widen_switch_i16_sext(
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; ARM64: %0 = sext i2 %a to i32
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; ARM64-NEXT: switch i32 %0, label %sw.default [
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; ARM64-NEXT: i32 1, label %sw.bb0
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; ARM64-NEXT: i32 -1, label %sw.bb1
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}
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