258 lines
9.8 KiB
LLVM
258 lines
9.8 KiB
LLVM
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; RUN: opt -S %s -atomic-expand | FileCheck %s
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;;; NOTE: this test is actually target-independent -- any target which
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;;; doesn't support inline atomics can be used. (E.g. X86 i386 would
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;;; work, if LLVM is properly taught about what it's missing vs i586.)
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;target datalayout = "e-m:e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"
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;target triple = "i386-unknown-unknown"
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target datalayout = "e-m:e-p:32:32-i64:64-f128:64-n32-S64"
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target triple = "sparc-unknown-unknown"
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;; First, check the sized calls. Except for cmpxchg, these are fairly
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;; straightforward.
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; CHECK-LABEL: @test_load_i16(
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; CHECK: %1 = bitcast i16* %arg to i8*
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; CHECK: %2 = call i16 @__atomic_load_2(i8* %1, i32 5)
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; CHECK: ret i16 %2
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define i16 @test_load_i16(i16* %arg) {
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%ret = load atomic i16, i16* %arg seq_cst, align 4
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ret i16 %ret
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}
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; CHECK-LABEL: @test_store_i16(
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; CHECK: %1 = bitcast i16* %arg to i8*
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; CHECK: call void @__atomic_store_2(i8* %1, i16 %val, i32 5)
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; CHECK: ret void
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define void @test_store_i16(i16* %arg, i16 %val) {
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store atomic i16 %val, i16* %arg seq_cst, align 4
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ret void
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}
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; CHECK-LABEL: @test_exchange_i16(
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; CHECK: %1 = bitcast i16* %arg to i8*
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; CHECK: %2 = call i16 @__atomic_exchange_2(i8* %1, i16 %val, i32 5)
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; CHECK: ret i16 %2
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define i16 @test_exchange_i16(i16* %arg, i16 %val) {
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%ret = atomicrmw xchg i16* %arg, i16 %val seq_cst
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ret i16 %ret
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}
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; CHECK-LABEL: @test_cmpxchg_i16(
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; CHECK: %1 = bitcast i16* %arg to i8*
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; CHECK: %2 = alloca i16, align 2
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; CHECK: %3 = bitcast i16* %2 to i8*
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; CHECK: call void @llvm.lifetime.start.p0i8(i64 2, i8* %3)
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; CHECK: store i16 %old, i16* %2, align 2
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; CHECK: %4 = call zeroext i1 @__atomic_compare_exchange_2(i8* %1, i8* %3, i16 %new, i32 5, i32 0)
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; CHECK: %5 = load i16, i16* %2, align 2
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; CHECK: call void @llvm.lifetime.end.p0i8(i64 2, i8* %3)
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; CHECK: %6 = insertvalue { i16, i1 } undef, i16 %5, 0
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; CHECK: %7 = insertvalue { i16, i1 } %6, i1 %4, 1
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; CHECK: %ret = extractvalue { i16, i1 } %7, 0
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; CHECK: ret i16 %ret
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define i16 @test_cmpxchg_i16(i16* %arg, i16 %old, i16 %new) {
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%ret_succ = cmpxchg i16* %arg, i16 %old, i16 %new seq_cst monotonic
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%ret = extractvalue { i16, i1 } %ret_succ, 0
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ret i16 %ret
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}
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; CHECK-LABEL: @test_add_i16(
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; CHECK: %1 = bitcast i16* %arg to i8*
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; CHECK: %2 = call i16 @__atomic_fetch_add_2(i8* %1, i16 %val, i32 5)
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; CHECK: ret i16 %2
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define i16 @test_add_i16(i16* %arg, i16 %val) {
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%ret = atomicrmw add i16* %arg, i16 %val seq_cst
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ret i16 %ret
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}
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;; Now, check the output for the unsized libcalls. i128 is used for
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;; these tests because the "16" suffixed functions aren't available on
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;; 32-bit i386.
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; CHECK-LABEL: @test_load_i128(
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; CHECK: %1 = bitcast i128* %arg to i8*
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; CHECK: %2 = alloca i128, align 8
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; CHECK: %3 = bitcast i128* %2 to i8*
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; CHECK: call void @llvm.lifetime.start.p0i8(i64 16, i8* %3)
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; CHECK: call void @__atomic_load(i32 16, i8* %1, i8* %3, i32 5)
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; CHECK: %4 = load i128, i128* %2, align 8
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; CHECK: call void @llvm.lifetime.end.p0i8(i64 16, i8* %3)
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; CHECK: ret i128 %4
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define i128 @test_load_i128(i128* %arg) {
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%ret = load atomic i128, i128* %arg seq_cst, align 16
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ret i128 %ret
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}
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; CHECK-LABEL: @test_store_i128(
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; CHECK: %1 = bitcast i128* %arg to i8*
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; CHECK: %2 = alloca i128, align 8
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; CHECK: %3 = bitcast i128* %2 to i8*
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; CHECK: call void @llvm.lifetime.start.p0i8(i64 16, i8* %3)
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; CHECK: store i128 %val, i128* %2, align 8
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; CHECK: call void @__atomic_store(i32 16, i8* %1, i8* %3, i32 5)
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; CHECK: call void @llvm.lifetime.end.p0i8(i64 16, i8* %3)
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; CHECK: ret void
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define void @test_store_i128(i128* %arg, i128 %val) {
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store atomic i128 %val, i128* %arg seq_cst, align 16
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ret void
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}
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; CHECK-LABEL: @test_exchange_i128(
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; CHECK: %1 = bitcast i128* %arg to i8*
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; CHECK: %2 = alloca i128, align 8
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; CHECK: %3 = bitcast i128* %2 to i8*
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; CHECK: call void @llvm.lifetime.start.p0i8(i64 16, i8* %3)
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; CHECK: store i128 %val, i128* %2, align 8
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; CHECK: %4 = alloca i128, align 8
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; CHECK: %5 = bitcast i128* %4 to i8*
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; CHECK: call void @llvm.lifetime.start.p0i8(i64 16, i8* %5)
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; CHECK: call void @__atomic_exchange(i32 16, i8* %1, i8* %3, i8* %5, i32 5)
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; CHECK: call void @llvm.lifetime.end.p0i8(i64 16, i8* %3)
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; CHECK: %6 = load i128, i128* %4, align 8
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; CHECK: call void @llvm.lifetime.end.p0i8(i64 16, i8* %5)
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; CHECK: ret i128 %6
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define i128 @test_exchange_i128(i128* %arg, i128 %val) {
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%ret = atomicrmw xchg i128* %arg, i128 %val seq_cst
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ret i128 %ret
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}
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; CHECK-LABEL: @test_cmpxchg_i128(
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; CHECK: %1 = bitcast i128* %arg to i8*
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; CHECK: %2 = alloca i128, align 8
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; CHECK: %3 = bitcast i128* %2 to i8*
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; CHECK: call void @llvm.lifetime.start.p0i8(i64 16, i8* %3)
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; CHECK: store i128 %old, i128* %2, align 8
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; CHECK: %4 = alloca i128, align 8
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; CHECK: %5 = bitcast i128* %4 to i8*
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; CHECK: call void @llvm.lifetime.start.p0i8(i64 16, i8* %5)
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; CHECK: store i128 %new, i128* %4, align 8
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; CHECK: %6 = call zeroext i1 @__atomic_compare_exchange(i32 16, i8* %1, i8* %3, i8* %5, i32 5, i32 0)
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; CHECK: call void @llvm.lifetime.end.p0i8(i64 16, i8* %5)
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; CHECK: %7 = load i128, i128* %2, align 8
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; CHECK: call void @llvm.lifetime.end.p0i8(i64 16, i8* %3)
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; CHECK: %8 = insertvalue { i128, i1 } undef, i128 %7, 0
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; CHECK: %9 = insertvalue { i128, i1 } %8, i1 %6, 1
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; CHECK: %ret = extractvalue { i128, i1 } %9, 0
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; CHECK: ret i128 %ret
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define i128 @test_cmpxchg_i128(i128* %arg, i128 %old, i128 %new) {
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%ret_succ = cmpxchg i128* %arg, i128 %old, i128 %new seq_cst monotonic
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%ret = extractvalue { i128, i1 } %ret_succ, 0
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ret i128 %ret
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}
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; This one is a verbose expansion, as there is no generic
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; __atomic_fetch_add function, so it needs to expand to a cmpxchg
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; loop, which then itself expands into a libcall.
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; CHECK-LABEL: @test_add_i128(
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; CHECK: %1 = alloca i128, align 8
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; CHECK: %2 = alloca i128, align 8
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; CHECK: %3 = load i128, i128* %arg, align 16
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; CHECK: br label %atomicrmw.start
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; CHECK:atomicrmw.start:
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; CHECK: %loaded = phi i128 [ %3, %0 ], [ %newloaded, %atomicrmw.start ]
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; CHECK: %new = add i128 %loaded, %val
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; CHECK: %4 = bitcast i128* %arg to i8*
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; CHECK: %5 = bitcast i128* %1 to i8*
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; CHECK: call void @llvm.lifetime.start.p0i8(i64 16, i8* %5)
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; CHECK: store i128 %loaded, i128* %1, align 8
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; CHECK: %6 = bitcast i128* %2 to i8*
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; CHECK: call void @llvm.lifetime.start.p0i8(i64 16, i8* %6)
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; CHECK: store i128 %new, i128* %2, align 8
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; CHECK: %7 = call zeroext i1 @__atomic_compare_exchange(i32 16, i8* %4, i8* %5, i8* %6, i32 5, i32 5)
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; CHECK: call void @llvm.lifetime.end.p0i8(i64 16, i8* %6)
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; CHECK: %8 = load i128, i128* %1, align 8
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; CHECK: call void @llvm.lifetime.end.p0i8(i64 16, i8* %5)
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; CHECK: %9 = insertvalue { i128, i1 } undef, i128 %8, 0
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; CHECK: %10 = insertvalue { i128, i1 } %9, i1 %7, 1
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; CHECK: %success = extractvalue { i128, i1 } %10, 1
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; CHECK: %newloaded = extractvalue { i128, i1 } %10, 0
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; CHECK: br i1 %success, label %atomicrmw.end, label %atomicrmw.start
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; CHECK:atomicrmw.end:
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; CHECK: ret i128 %newloaded
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define i128 @test_add_i128(i128* %arg, i128 %val) {
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%ret = atomicrmw add i128* %arg, i128 %val seq_cst
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ret i128 %ret
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}
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;; Ensure that non-integer types get bitcast correctly on the way in and out of a libcall:
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; CHECK-LABEL: @test_load_double(
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; CHECK: %1 = bitcast double* %arg to i8*
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; CHECK: %2 = call i64 @__atomic_load_8(i8* %1, i32 5)
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; CHECK: %3 = bitcast i64 %2 to double
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; CHECK: ret double %3
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define double @test_load_double(double* %arg, double %val) {
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%1 = load atomic double, double* %arg seq_cst, align 16
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ret double %1
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}
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; CHECK-LABEL: @test_store_double(
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; CHECK: %1 = bitcast double* %arg to i8*
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; CHECK: %2 = bitcast double %val to i64
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; CHECK: call void @__atomic_store_8(i8* %1, i64 %2, i32 5)
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; CHECK: ret void
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define void @test_store_double(double* %arg, double %val) {
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store atomic double %val, double* %arg seq_cst, align 16
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ret void
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}
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; CHECK-LABEL: @test_cmpxchg_ptr(
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; CHECK: %1 = bitcast i16** %arg to i8*
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; CHECK: %2 = alloca i16*, align 4
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; CHECK: %3 = bitcast i16** %2 to i8*
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; CHECK: call void @llvm.lifetime.start.p0i8(i64 4, i8* %3)
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; CHECK: store i16* %old, i16** %2, align 4
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; CHECK: %4 = ptrtoint i16* %new to i32
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; CHECK: %5 = call zeroext i1 @__atomic_compare_exchange_4(i8* %1, i8* %3, i32 %4, i32 5, i32 2)
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; CHECK: %6 = load i16*, i16** %2, align 4
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; CHECK: call void @llvm.lifetime.end.p0i8(i64 4, i8* %3)
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; CHECK: %7 = insertvalue { i16*, i1 } undef, i16* %6, 0
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; CHECK: %8 = insertvalue { i16*, i1 } %7, i1 %5, 1
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; CHECK: %ret = extractvalue { i16*, i1 } %8, 0
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; CHECK: ret i16* %ret
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; CHECK: }
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define i16* @test_cmpxchg_ptr(i16** %arg, i16* %old, i16* %new) {
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%ret_succ = cmpxchg i16** %arg, i16* %old, i16* %new seq_cst acquire
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%ret = extractvalue { i16*, i1 } %ret_succ, 0
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ret i16* %ret
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}
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;; ...and for a non-integer type of large size too.
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; CHECK-LABEL: @test_store_fp128
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; CHECK: %1 = bitcast fp128* %arg to i8*
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; CHECK: %2 = alloca fp128, align 8
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; CHECK: %3 = bitcast fp128* %2 to i8*
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; CHECK: call void @llvm.lifetime.start.p0i8(i64 16, i8* %3)
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; CHECK: store fp128 %val, fp128* %2, align 8
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; CHECK: call void @__atomic_store(i32 16, i8* %1, i8* %3, i32 5)
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; CHECK: call void @llvm.lifetime.end.p0i8(i64 16, i8* %3)
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; CHECK: ret void
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define void @test_store_fp128(fp128* %arg, fp128 %val) {
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store atomic fp128 %val, fp128* %arg seq_cst, align 16
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ret void
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}
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;; Unaligned loads and stores should be expanded to the generic
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;; libcall, just like large loads/stores, and not a specialized one.
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;; NOTE: atomicrmw and cmpxchg don't yet support an align attribute;
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;; when such support is added, they should also be tested here.
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; CHECK-LABEL: @test_unaligned_load_i16(
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; CHECK: __atomic_load(
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define i16 @test_unaligned_load_i16(i16* %arg) {
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%ret = load atomic i16, i16* %arg seq_cst, align 1
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ret i16 %ret
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}
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; CHECK-LABEL: @test_unaligned_store_i16(
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; CHECK: __atomic_store(
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define void @test_unaligned_store_i16(i16* %arg, i16 %val) {
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store atomic i16 %val, i16* %arg seq_cst, align 1
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ret void
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}
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