55 lines
1.6 KiB
ArmAsm
55 lines
1.6 KiB
ArmAsm
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// RUN: not llvm-mc -triple i686-unknown-unknown -x86-asm-syntax=att %s -o /dev/null 2>&1 | FileCheck %s
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// This tests weird forms of Intel and AT&T syntax that gas accepts that we
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// don't. The [no]prefix operand of the syntax directive indicates whether
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// registers need a '%' prefix.
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.intel_syntax prefix
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// CHECK: error: '.intel_syntax prefix' is not supported: registers must not have a '%' prefix in .intel_syntax
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_test2:
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mov DWORD PTR [%esp - 4], 257
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.att_syntax noprefix
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// CHECK: error: '.att_syntax noprefix' is not supported: registers must have a '%' prefix in .att_syntax
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movl $257, -4(esp)
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.intel_syntax noprefix
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.global arr
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.global i
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.set FOO, 2
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//CHECK: error: cannot use more than one symbol in memory operand
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mov eax, DWORD PTR arr[i]
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//CHECK: error: rip can only be used as a base register
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.code64
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mov rax, rip
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//CHECK: error: invalid base+index expression
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mov rbx, [rax+rip]
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//CHECK: error: scale factor in address must be 1, 2, 4 or 8
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lea RDX, [unknown_number * RAX + RBX + _foo]
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//CHECK: error: BaseReg/IndexReg already set!
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lea RDX, [4 * RAX + 27 * RBX + _pat]
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//CHECK: error: unexpected bracket encountered
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lea RDX, [[arr]
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//CHECK: error: unexpected bracket encountered
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lea RDX, [arr[]
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.intel_syntax
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// CHECK: error: invalid operand for instruction
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punpcklbw mm0, qword ptr [rsp]
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// CHECK: error: invalid operand for instruction
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punpcklwd mm0, word ptr [rsp]
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// CHECK: error: invalid operand for instruction
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punpckldq mm0, qword ptr [rsp]
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// CHECK: error: invalid 16-bit base register
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lea bx, [ax]
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// CHECK: invalid base+index expression
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lea eax, [eax+esp*1]
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// CHECK: 16-bit addresses cannot have a scale
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lea ax, [bx+si*1]
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