194 lines
4.6 KiB
ArmAsm
194 lines
4.6 KiB
ArmAsm
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# RUN: llvm-mc %s -triple=riscv32 -riscv-no-aliases -show-encoding \
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# RUN: | FileCheck -check-prefixes=CHECK-INST,CHECK-ENC %s
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# RUN: llvm-mc -filetype=obj -triple riscv32 < %s \
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# RUN: | llvm-objdump -d - \
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# RUN: | FileCheck -check-prefix=CHECK-INST-ALIAS %s
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#
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# RUN: llvm-mc %s -triple=riscv64 -riscv-no-aliases -show-encoding \
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# RUN: | FileCheck -check-prefixes=CHECK-INST,CHECK-ENC %s
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# RUN: llvm-mc -filetype=obj -triple riscv64 < %s \
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# RUN: | llvm-objdump -d - \
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# RUN: | FileCheck -check-prefix=CHECK-INST-ALIAS %s
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##################################
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# Supervisor Trap Setup
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##################################
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# sstatus
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# name
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# CHECK-INST: csrrs t1, sstatus, zero
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# CHECK-ENC: encoding: [0x73,0x23,0x00,0x10]
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# CHECK-INST-ALIAS: csrr t1, sstatus
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# uimm12
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# CHECK-INST: csrrs t2, sstatus, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0x00,0x10]
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# CHECK-INST-ALIAS: csrr t2, sstatus
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# name
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csrrs t1, sstatus, zero
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# uimm12
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csrrs t2, 0x100, zero
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# sedeleg
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# name
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# CHECK-INST: csrrs t1, sedeleg, zero
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# CHECK-ENC: encoding: [0x73,0x23,0x20,0x10]
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# CHECK-INST-ALIAS: csrr t1, sedeleg
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# uimm12
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# CHECK-INST: csrrs t2, sedeleg, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0x20,0x10]
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# CHECK-INST-ALIAS: csrr t2, sedeleg
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# name
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csrrs t1, sedeleg, zero
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# uimm12
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csrrs t2, 0x102, zero
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# sideleg
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# name
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# CHECK-INST: csrrs t1, sideleg, zero
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# CHECK-ENC: encoding: [0x73,0x23,0x30,0x10]
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# CHECK-INST-ALIAS: csrr t1, sideleg
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# uimm12
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# CHECK-INST: csrrs t2, sideleg, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0x30,0x10]
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# CHECK-INST-ALIAS: csrr t2, sideleg
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# name
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csrrs t1, sideleg, zero
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# uimm12
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csrrs t2, 0x103, zero
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# sie
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# name
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# CHECK-INST: csrrs t1, sie, zero
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# CHECK-ENC: [0x73,0x23,0x40,0x10]
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# CHECK-INST-ALIAS: csrr t1, sie
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# uimm12
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# CHECK-INST: csrrs t2, sie, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0x40,0x10]
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# CHECK-INST-ALIAS: csrr t2, sie
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# name
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csrrs t1, sie, zero
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# uimm12
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csrrs t2, 0x104, zero
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# stvec
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# name
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# CHECK-INST: csrrs t1, stvec, zero
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# CHECK-ENC: encoding: [0x73,0x23,0x50,0x10]
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# CHECK-INST-ALIAS: csrr t1, stvec
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# uimm12
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# CHECK-INST: csrrs t2, stvec, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0x50,0x10]
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# CHECK-INST-ALIAS: csrr t2, stvec
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# name
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csrrs t1, stvec, zero
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# uimm12
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csrrs t2, 0x105, zero
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# scounteren
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# name
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# CHECK-INST: csrrs t1, scounteren, zero
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# CHECK-ENC: encoding: [0x73,0x23,0x60,0x10]
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# CHECK-INST-ALIAS: csrr t1, scounteren
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# uimm12
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# CHECK-INST: csrrs t2, scounteren, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0x60,0x10]
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# CHECK-INST-ALIAS: csrr t2, scounteren
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# name
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csrrs t1, scounteren, zero
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# uimm12
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csrrs t2, 0x106, zero
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##################################
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# Supervisor Trap Handling
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##################################
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# sscratch
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# name
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# CHECK-INST: csrrs t1, sscratch, zero
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# CHECK-ENC: encoding: [0x73,0x23,0x00,0x14]
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# CHECK-INST-ALIAS: csrr t1, sscratch
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# uimm12
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# CHECK-INST: csrrs t2, sscratch, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0x00,0x14]
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# CHECK-INST-ALIAS: csrr t2, sscratch
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# name
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csrrs t1, sscratch, zero
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# uimm12
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csrrs t2, 0x140, zero
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# sepc
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# name
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# CHECK-INST: csrrs t1, sepc, zero
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# CHECK-ENC: encoding: [0x73,0x23,0x10,0x14]
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# CHECK-INST-ALIAS: csrr t1, sepc
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# uimm12
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# CHECK-INST: csrrs t2, sepc, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0x10,0x14]
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# CHECK-INST-ALIAS: csrr t2, sepc
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# name
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csrrs t1, sepc, zero
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# uimm12
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csrrs t2, 0x141, zero
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# scause
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# name
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# CHECK-INST: csrrs t1, scause, zero
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# CHECK-ENC: encoding: [0x73,0x23,0x20,0x14]
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# CHECK-INST-ALIAS: csrr t1, scause
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# uimm12
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# CHECK-INST: csrrs t2, scause, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0x20,0x14]
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# CHECK-INST-ALIAS: csrr t2, scause
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# name
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csrrs t1, scause, zero
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# uimm12
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csrrs t2, 0x142, zero
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# stval
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# name
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# CHECK-INST: csrrs t1, stval, zero
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# CHECK-ENC: encoding: [0x73,0x23,0x30,0x14]
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# CHECK-INST-ALIAS: csrr t1, stval
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# uimm12
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# CHECK-INST: csrrs t2, stval, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0x30,0x14]
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# CHECK-INST-ALIAS: csrr t2, stval
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# aliases
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# aliases with uimm12
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# name
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csrrs t1, stval, zero
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# uimm12
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csrrs t2, 0x143, zero
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# sip
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# name
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# CHECK-INST: csrrs t1, sip, zero
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# CHECK-ENC: encoding: [0x73,0x23,0x40,0x14]
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# CHECK-INST-ALIAS: csrr t1, sip
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# uimm12
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# CHECK-INST: csrrs t2, sip, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0x40,0x14]
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# CHECK-INST-ALIAS: csrr t2, sip
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csrrs t1, sip, zero
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# uimm12
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csrrs t2, 0x144, zero
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#########################################
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# Supervisor Protection and Translation
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#########################################
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# satp
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# name
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# CHECK-INST: csrrs t1, satp, zero
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# CHECK-ENC: encoding: [0x73,0x23,0x00,0x18]
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# CHECK-INST-ALIAS: csrr t1, satp
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# uimm12
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# CHECK-INST: csrrs t2, satp, zero
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# CHECK-ENC: encoding: [0xf3,0x23,0x00,0x18]
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# CHECK-INST-ALIAS: csrr t2, satp
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# name
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csrrs t1, satp, zero
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# uimm12
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csrrs t2, 0x180, zero
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