48 lines
1.3 KiB
ArmAsm
48 lines
1.3 KiB
ArmAsm
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# RUN: llvm-mc -filetype=obj -triple=riscv32 -mattr=+relax %s \
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# RUN: | llvm-readobj -r - | FileCheck -check-prefix=RELAX %s
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# RUN: llvm-mc -filetype=obj -triple=riscv32 -mattr=-relax %s \
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# RUN: | llvm-readobj -r - | FileCheck -check-prefix=NORELAX %s
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# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+relax %s \
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# RUN: | llvm-readobj -r - | FileCheck -check-prefix=RELAX %s
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# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=-relax %s \
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# RUN: | llvm-readobj -r - | FileCheck -check-prefix=NORELAX %s
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# Check that subtraction expressions are emitted as two relocations
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# only when relaxation is enabled
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.globl G1
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.globl G2
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.L1:
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G1:
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addi a0, a0, 0
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.L2:
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G2:
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.data
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.dword .L2-.L1
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.dword G2-G1
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.word .L2-.L1
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.word G2-G1
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.half .L2-.L1
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.half G2-G1
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.byte .L2-.L1
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.byte G2-G1
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# RELAX: 0x0 R_RISCV_ADD64 .L2 0x0
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# RELAX: 0x0 R_RISCV_SUB64 .L1 0x0
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# RELAX: 0x8 R_RISCV_ADD64 G2 0x0
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# RELAX: 0x8 R_RISCV_SUB64 G1 0x0
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# RELAX: 0x10 R_RISCV_ADD32 .L2 0x0
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# RELAX: 0x10 R_RISCV_SUB32 .L1 0x0
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# RELAX: 0x14 R_RISCV_ADD32 G2 0x0
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# RELAX: 0x14 R_RISCV_SUB32 G1 0x0
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# RELAX: 0x18 R_RISCV_ADD16 .L2 0x0
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# RELAX: 0x18 R_RISCV_SUB16 .L1 0x0
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# RELAX: 0x1A R_RISCV_ADD16 G2 0x0
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# RELAX: 0x1A R_RISCV_SUB16 G1 0x0
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# RELAX: 0x1C R_RISCV_ADD8 .L2 0x0
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# RELAX: 0x1C R_RISCV_SUB8 .L1 0x0
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# RELAX: 0x1D R_RISCV_ADD8 G2 0x0
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# RELAX: 0x1D R_RISCV_SUB8 G1 0x0
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# NORELAX-NOT: R_RISCV
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