llvm-for-llvmta/test/MC/Disassembler/X86/intel-syntax-x86-64-avx_vnni.txt

# RUN: llvm-mc --disassemble %s -triple=x86_64 -x86-asm-syntax=intel --output-asm-variant=1 | FileCheck %s

# CHECK: {vex} vpdpbusd ymm6, ymm5, ymm4
0xc4,0xe2,0x55,0x50,0xf4

# CHECK: {vex} vpdpbusd xmm6, xmm5, xmm4
0xc4,0xe2,0x51,0x50,0xf4

# CHECK: {vex} vpdpbusd ymm6, ymm5, ymmword ptr [rbp + 8*r14 + 268435456]
0xc4,0xa2,0x55,0x50,0xb4,0xf5,0x00,0x00,0x00,0x10

# CHECK: {vex} vpdpbusd ymm6, ymm5, ymmword ptr [r8 + 4*rax + 291]
0xc4,0xc2,0x55,0x50,0xb4,0x80,0x23,0x01,0x00,0x00

# CHECK: {vex} vpdpbusd ymm6, ymm5, ymmword ptr [rip]
0xc4,0xe2,0x55,0x50,0x35,0x00,0x00,0x00,0x00

# CHECK: {vex} vpdpbusd ymm6, ymm5, ymmword ptr [2*rbp - 1024]
0xc4,0xe2,0x55,0x50,0x34,0x6d,0x00,0xfc,0xff,0xff

# CHECK: {vex} vpdpbusd ymm6, ymm5, ymmword ptr [rcx + 4064]
0xc4,0xe2,0x55,0x50,0xb1,0xe0,0x0f,0x00,0x00

# CHECK: {vex} vpdpbusd ymm6, ymm5, ymmword ptr [rdx - 4096]
0xc4,0xe2,0x55,0x50,0xb2,0x00,0xf0,0xff,0xff

# CHECK: {vex} vpdpbusd xmm6, xmm5, xmmword ptr [rbp + 8*r14 + 268435456]
0xc4,0xa2,0x51,0x50,0xb4,0xf5,0x00,0x00,0x00,0x10

# CHECK: {vex} vpdpbusd xmm6, xmm5, xmmword ptr [r8 + 4*rax + 291]
0xc4,0xc2,0x51,0x50,0xb4,0x80,0x23,0x01,0x00,0x00

# CHECK: {vex} vpdpbusd xmm6, xmm5, xmmword ptr [rip]
0xc4,0xe2,0x51,0x50,0x35,0x00,0x00,0x00,0x00

# CHECK: {vex} vpdpbusd xmm6, xmm5, xmmword ptr [2*rbp - 512]
0xc4,0xe2,0x51,0x50,0x34,0x6d,0x00,0xfe,0xff,0xff

# CHECK: {vex} vpdpbusd xmm6, xmm5, xmmword ptr [rcx + 2032]
0xc4,0xe2,0x51,0x50,0xb1,0xf0,0x07,0x00,0x00

# CHECK: {vex} vpdpbusd xmm6, xmm5, xmmword ptr [rdx - 2048]
0xc4,0xe2,0x51,0x50,0xb2,0x00,0xf8,0xff,0xff

# CHECK: {vex} vpdpbusds ymm6, ymm5, ymm4
0xc4,0xe2,0x55,0x51,0xf4

# CHECK: {vex} vpdpbusds xmm6, xmm5, xmm4
0xc4,0xe2,0x51,0x51,0xf4

# CHECK: {vex} vpdpbusds ymm6, ymm5, ymmword ptr [rbp + 8*r14 + 268435456]
0xc4,0xa2,0x55,0x51,0xb4,0xf5,0x00,0x00,0x00,0x10

# CHECK: {vex} vpdpbusds ymm6, ymm5, ymmword ptr [r8 + 4*rax + 291]
0xc4,0xc2,0x55,0x51,0xb4,0x80,0x23,0x01,0x00,0x00

# CHECK: {vex} vpdpbusds ymm6, ymm5, ymmword ptr [rip]
0xc4,0xe2,0x55,0x51,0x35,0x00,0x00,0x00,0x00

# CHECK: {vex} vpdpbusds ymm6, ymm5, ymmword ptr [2*rbp - 1024]
0xc4,0xe2,0x55,0x51,0x34,0x6d,0x00,0xfc,0xff,0xff

# CHECK: {vex} vpdpbusds ymm6, ymm5, ymmword ptr [rcx + 4064]
0xc4,0xe2,0x55,0x51,0xb1,0xe0,0x0f,0x00,0x00

# CHECK: {vex} vpdpbusds ymm6, ymm5, ymmword ptr [rdx - 4096]
0xc4,0xe2,0x55,0x51,0xb2,0x00,0xf0,0xff,0xff

# CHECK: {vex} vpdpbusds xmm6, xmm5, xmmword ptr [rbp + 8*r14 + 268435456]
0xc4,0xa2,0x51,0x51,0xb4,0xf5,0x00,0x00,0x00,0x10

# CHECK: {vex} vpdpbusds xmm6, xmm5, xmmword ptr [r8 + 4*rax + 291]
0xc4,0xc2,0x51,0x51,0xb4,0x80,0x23,0x01,0x00,0x00

# CHECK: {vex} vpdpbusds xmm6, xmm5, xmmword ptr [rip]
0xc4,0xe2,0x51,0x51,0x35,0x00,0x00,0x00,0x00

# CHECK: {vex} vpdpbusds xmm6, xmm5, xmmword ptr [2*rbp - 512]
0xc4,0xe2,0x51,0x51,0x34,0x6d,0x00,0xfe,0xff,0xff

# CHECK: {vex} vpdpbusds xmm6, xmm5, xmmword ptr [rcx + 2032]
0xc4,0xe2,0x51,0x51,0xb1,0xf0,0x07,0x00,0x00

# CHECK: {vex} vpdpbusds xmm6, xmm5, xmmword ptr [rdx - 2048]
0xc4,0xe2,0x51,0x51,0xb2,0x00,0xf8,0xff,0xff

# CHECK: {vex} vpdpwssd ymm6, ymm5, ymm4
0xc4,0xe2,0x55,0x52,0xf4

# CHECK: {vex} vpdpwssd xmm6, xmm5, xmm4
0xc4,0xe2,0x51,0x52,0xf4

# CHECK: {vex} vpdpwssd ymm6, ymm5, ymmword ptr [rbp + 8*r14 + 268435456]
0xc4,0xa2,0x55,0x52,0xb4,0xf5,0x00,0x00,0x00,0x10

# CHECK: {vex} vpdpwssd ymm6, ymm5, ymmword ptr [r8 + 4*rax + 291]
0xc4,0xc2,0x55,0x52,0xb4,0x80,0x23,0x01,0x00,0x00

# CHECK: {vex} vpdpwssd ymm6, ymm5, ymmword ptr [rip]
0xc4,0xe2,0x55,0x52,0x35,0x00,0x00,0x00,0x00

# CHECK: {vex} vpdpwssd ymm6, ymm5, ymmword ptr [2*rbp - 1024]
0xc4,0xe2,0x55,0x52,0x34,0x6d,0x00,0xfc,0xff,0xff

# CHECK: {vex} vpdpwssd ymm6, ymm5, ymmword ptr [rcx + 4064]
0xc4,0xe2,0x55,0x52,0xb1,0xe0,0x0f,0x00,0x00

# CHECK: {vex} vpdpwssd ymm6, ymm5, ymmword ptr [rdx - 4096]
0xc4,0xe2,0x55,0x52,0xb2,0x00,0xf0,0xff,0xff

# CHECK: {vex} vpdpwssd xmm6, xmm5, xmmword ptr [rbp + 8*r14 + 268435456]
0xc4,0xa2,0x51,0x52,0xb4,0xf5,0x00,0x00,0x00,0x10

# CHECK: {vex} vpdpwssd xmm6, xmm5, xmmword ptr [r8 + 4*rax + 291]
0xc4,0xc2,0x51,0x52,0xb4,0x80,0x23,0x01,0x00,0x00

# CHECK: {vex} vpdpwssd xmm6, xmm5, xmmword ptr [rip]
0xc4,0xe2,0x51,0x52,0x35,0x00,0x00,0x00,0x00

# CHECK: {vex} vpdpwssd xmm6, xmm5, xmmword ptr [2*rbp - 512]
0xc4,0xe2,0x51,0x52,0x34,0x6d,0x00,0xfe,0xff,0xff

# CHECK: {vex} vpdpwssd xmm6, xmm5, xmmword ptr [rcx + 2032]
0xc4,0xe2,0x51,0x52,0xb1,0xf0,0x07,0x00,0x00

# CHECK: {vex} vpdpwssd xmm6, xmm5, xmmword ptr [rdx - 2048]
0xc4,0xe2,0x51,0x52,0xb2,0x00,0xf8,0xff,0xff

# CHECK: {vex} vpdpwssds ymm6, ymm5, ymm4
0xc4,0xe2,0x55,0x53,0xf4

# CHECK: {vex} vpdpwssds xmm6, xmm5, xmm4
0xc4,0xe2,0x51,0x53,0xf4

# CHECK: {vex} vpdpwssds ymm6, ymm5, ymmword ptr [rbp + 8*r14 + 268435456]
0xc4,0xa2,0x55,0x53,0xb4,0xf5,0x00,0x00,0x00,0x10

# CHECK: {vex} vpdpwssds ymm6, ymm5, ymmword ptr [r8 + 4*rax + 291]
0xc4,0xc2,0x55,0x53,0xb4,0x80,0x23,0x01,0x00,0x00

# CHECK: {vex} vpdpwssds ymm6, ymm5, ymmword ptr [rip]
0xc4,0xe2,0x55,0x53,0x35,0x00,0x00,0x00,0x00

# CHECK: {vex} vpdpwssds ymm6, ymm5, ymmword ptr [2*rbp - 1024]
0xc4,0xe2,0x55,0x53,0x34,0x6d,0x00,0xfc,0xff,0xff

# CHECK: {vex} vpdpwssds ymm6, ymm5, ymmword ptr [rcx + 4064]
0xc4,0xe2,0x55,0x53,0xb1,0xe0,0x0f,0x00,0x00

# CHECK: {vex} vpdpwssds ymm6, ymm5, ymmword ptr [rdx - 4096]
0xc4,0xe2,0x55,0x53,0xb2,0x00,0xf0,0xff,0xff

# CHECK: {vex} vpdpwssds xmm6, xmm5, xmmword ptr [rbp + 8*r14 + 268435456]
0xc4,0xa2,0x51,0x53,0xb4,0xf5,0x00,0x00,0x00,0x10

# CHECK: {vex} vpdpwssds xmm6, xmm5, xmmword ptr [r8 + 4*rax + 291]
0xc4,0xc2,0x51,0x53,0xb4,0x80,0x23,0x01,0x00,0x00

# CHECK: {vex} vpdpwssds xmm6, xmm5, xmmword ptr [rip]
0xc4,0xe2,0x51,0x53,0x35,0x00,0x00,0x00,0x00

# CHECK: {vex} vpdpwssds xmm6, xmm5, xmmword ptr [2*rbp - 512]
0xc4,0xe2,0x51,0x53,0x34,0x6d,0x00,0xfe,0xff,0xff

# CHECK: {vex} vpdpwssds xmm6, xmm5, xmmword ptr [rcx + 2032]
0xc4,0xe2,0x51,0x53,0xb1,0xf0,0x07,0x00,0x00

# CHECK: {vex} vpdpwssds xmm6, xmm5, xmmword ptr [rdx - 2048]
0xc4,0xe2,0x51,0x53,0xb2,0x00,0xf8,0xff,0xff