50 lines
1.9 KiB
ArmAsm
50 lines
1.9 KiB
ArmAsm
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// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2 2>&1 < %s| FileCheck %s
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// --------------------------------------------------------------------------//
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// Invalid element width
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histcnt z0.b, p0/z, z0.b, z0.b
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
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// CHECK-NEXT: histcnt z0.b, p0/z, z0.b, z0.b
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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histcnt z0.h, p0/z, z0.h, z1.h
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
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// CHECK-NEXT: histcnt z0.h, p0/z, z0.h, z1.h
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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// --------------------------------------------------------------------------//
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// Invalid predicate operation
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histcnt z0.s, p0/m, z1.s, z2.s
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
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// CHECK-NEXT: histcnt z0.s, p0/m, z1.s, z2.s
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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// --------------------------------------------------------------------------//
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// Predicate not in restricted predicate range
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histcnt z0.s, p8/z, z1.s, z2.s
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)
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// CHECK-NEXT: histcnt z0.s, p8/z, z1.s, z2.s
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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// --------------------------------------------------------------------------//
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// Negative tests for instructions that are incompatible with movprfx
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movprfx z0.s, p0/z, z7.s
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histcnt z0.s, p7/z, z1.s, z2.s
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
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// CHECK-NEXT: histcnt z0.s, p7/z, z1.s, z2.s
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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movprfx z0, z7
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histcnt z0.s, p7/z, z1.s, z2.s
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
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// CHECK-NEXT: histcnt z0.s, p7/z, z1.s, z2.s
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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