72 lines
2.6 KiB
ArmAsm
72 lines
2.6 KiB
ArmAsm
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// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2 2>&1 < %s| FileCheck %s
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// ------------------------------------------------------------------------- //
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// z register out of range for index
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fmlslb z0.s, z1.h, z8.h[0]
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
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// CHECK-NEXT: fmlslb z0.s, z1.h, z8.h[0]
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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// ------------------------------------------------------------------------- //
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// Index out of bounds
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fmlslb z0.s, z1.h, z7.h[-1]
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 7].
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// CHECK-NEXT: fmlslb z0.s, z1.h, z7.h[-1]
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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fmlslb z0.s, z1.h, z7.h[8]
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 7].
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// CHECK-NEXT: fmlslb z0.s, z1.h, z7.h[8]
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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// ------------------------------------------------------------------------- //
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// Invalid element width
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fmlslb z0.s, z1.b, z2.b
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
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// CHECK-NEXT: fmlslb z0.s, z1.b, z2.b
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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fmlslb z0.s, z1.s, z2.s
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
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// CHECK-NEXT: fmlslb z0.s, z1.s, z2.s
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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fmlslb z0.s, z1.d, z2.d
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
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// CHECK-NEXT: fmlslb z0.s, z1.d, z2.d
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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fmlslb z0.s, z1.b, z2.b[0]
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
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// CHECK-NEXT: fmlslb z0.s, z1.b, z2.b[0]
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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fmlslb z0.s, z1.s, z2.s[0]
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
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// CHECK-NEXT: fmlslb z0.s, z1.s, z2.s[0]
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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fmlslb z0.s, z1.d, z2.d[0]
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
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// CHECK-NEXT: fmlslb z0.s, z1.d, z2.d[0]
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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// --------------------------------------------------------------------------//
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// Negative tests for instructions that are incompatible with movprfx
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movprfx z29.s, p0/z, z7.s
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fmlslb z29.s, z30.h, z31.h
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
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// CHECK-NEXT: fmlslb z29.s, z30.h, z31.h
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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movprfx z0.s, p0/z, z7.s
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fmlslb z0.s, z1.h, z7.h[0]
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
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// CHECK-NEXT: fmlslb z0.s, z1.h, z7.h[0]
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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