81 lines
3.1 KiB
ArmAsm
81 lines
3.1 KiB
ArmAsm
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// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
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// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
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// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
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// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
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// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
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// RUN: | llvm-objdump -d --mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
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// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
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// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
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ldnf1sb z0.h, p0/z, [x0]
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// CHECK-INST: ldnf1sb { z0.h }, p0/z, [x0]
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// CHECK-ENCODING: [0x00,0xa0,0xd0,0xa5]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 00 a0 d0 a5 <unknown>
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ldnf1sb z0.s, p0/z, [x0]
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// CHECK-INST: ldnf1sb { z0.s }, p0/z, [x0]
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// CHECK-ENCODING: [0x00,0xa0,0xb0,0xa5]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 00 a0 b0 a5 <unknown>
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ldnf1sb z0.d, p0/z, [x0]
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// CHECK-INST: ldnf1sb { z0.d }, p0/z, [x0]
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// CHECK-ENCODING: [0x00,0xa0,0x90,0xa5]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 00 a0 90 a5 <unknown>
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ldnf1sb { z0.h }, p0/z, [x0]
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// CHECK-INST: ldnf1sb { z0.h }, p0/z, [x0]
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// CHECK-ENCODING: [0x00,0xa0,0xd0,0xa5]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 00 a0 d0 a5 <unknown>
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ldnf1sb { z0.s }, p0/z, [x0]
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// CHECK-INST: ldnf1sb { z0.s }, p0/z, [x0]
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// CHECK-ENCODING: [0x00,0xa0,0xb0,0xa5]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 00 a0 b0 a5 <unknown>
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ldnf1sb { z0.d }, p0/z, [x0]
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// CHECK-INST: ldnf1sb { z0.d }, p0/z, [x0]
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// CHECK-ENCODING: [0x00,0xa0,0x90,0xa5]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 00 a0 90 a5 <unknown>
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ldnf1sb { z31.h }, p7/z, [sp, #-1, mul vl]
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// CHECK-INST: ldnf1sb { z31.h }, p7/z, [sp, #-1, mul vl]
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// CHECK-ENCODING: [0xff,0xbf,0xdf,0xa5]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: ff bf df a5 <unknown>
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ldnf1sb { z21.h }, p5/z, [x10, #5, mul vl]
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// CHECK-INST: ldnf1sb { z21.h }, p5/z, [x10, #5, mul vl]
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// CHECK-ENCODING: [0x55,0xb5,0xd5,0xa5]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 55 b5 d5 a5 <unknown>
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ldnf1sb { z31.s }, p7/z, [sp, #-1, mul vl]
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// CHECK-INST: ldnf1sb { z31.s }, p7/z, [sp, #-1, mul vl]
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// CHECK-ENCODING: [0xff,0xbf,0xbf,0xa5]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: ff bf bf a5 <unknown>
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ldnf1sb { z21.s }, p5/z, [x10, #5, mul vl]
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// CHECK-INST: ldnf1sb { z21.s }, p5/z, [x10, #5, mul vl]
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// CHECK-ENCODING: [0x55,0xb5,0xb5,0xa5]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 55 b5 b5 a5 <unknown>
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ldnf1sb { z31.d }, p7/z, [sp, #-1, mul vl]
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// CHECK-INST: ldnf1sb { z31.d }, p7/z, [sp, #-1, mul vl]
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// CHECK-ENCODING: [0xff,0xbf,0x9f,0xa5]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: ff bf 9f a5 <unknown>
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ldnf1sb { z21.d }, p5/z, [x10, #5, mul vl]
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// CHECK-INST: ldnf1sb { z21.d }, p5/z, [x10, #5, mul vl]
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// CHECK-ENCODING: [0x55,0xb5,0x95,0xa5]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 55 b5 95 a5 <unknown>
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