182 lines
6.4 KiB
Plaintext
182 lines
6.4 KiB
Plaintext
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# RUN: llc -mtriple=x86_64-linux-gnu -mattr=+avx -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=ALL,NO_AVX512F
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# RUN: llc -mtriple=x86_64-linux-gnu -mattr=+avx512f -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=ALL,AVX512ALL,AVX512F
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# RUN: llc -mtriple=x86_64-linux-gnu -mattr=+avx512f -mattr=+avx512vl -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=ALL,AVX512ALL,AVX512VL
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--- |
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define <8 x i32> @test_load_v8i32_noalign(<8 x i32>* %p1) {
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%r = load <8 x i32>, <8 x i32>* %p1, align 1
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ret <8 x i32> %r
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}
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define <8 x i32> @test_load_v8i32_align(<8 x i32>* %p1) {
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%r = load <8 x i32>, <8 x i32>* %p1, align 32
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ret <8 x i32> %r
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}
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define void @test_store_v8i32_noalign(<8 x i32> %val, <8 x i32>* %p1) {
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store <8 x i32> %val, <8 x i32>* %p1, align 1
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ret void
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}
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define void @test_store_v8i32_align(<8 x i32> %val, <8 x i32>* %p1) {
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store <8 x i32> %val, <8 x i32>* %p1, align 32
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ret void
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}
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...
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---
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name: test_load_v8i32_noalign
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# ALL-LABEL: name: test_load_v8i32_noalign
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alignment: 16
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legalized: true
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regBankSelected: true
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# NO_AVX512F: registers:
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# NO_AVX512F-NEXT: - { id: 0, class: gr64, preferred-register: '' }
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# NO_AVX512F-NEXT: - { id: 1, class: vr256, preferred-register: '' }
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#
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# AVX512ALL: registers:
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# AVX512ALL-NEXT: - { id: 0, class: gr64, preferred-register: '' }
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# AVX512ALL-NEXT: - { id: 1, class: vr256x, preferred-register: '' }
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registers:
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- { id: 0, class: gpr }
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- { id: 1, class: vecr }
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# NO_AVX512F: %0:gr64 = COPY $rdi
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# NO_AVX512F-NEXT: %1:vr256 = VMOVUPSYrm %0, 1, $noreg, 0, $noreg :: (load 32 from %ir.p1, align 1)
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# NO_AVX512F-NEXT: $ymm0 = COPY %1
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# NO_AVX512F-NEXT: RET 0, implicit $ymm0
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#
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# AVX512F: %0:gr64 = COPY $rdi
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# AVX512F-NEXT: %1:vr256x = VMOVUPSZ256rm_NOVLX %0, 1, $noreg, 0, $noreg :: (load 32 from %ir.p1, align 1)
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# AVX512F-NEXT: $ymm0 = COPY %1
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# AVX512F-NEXT: RET 0, implicit $ymm0
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#
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# AVX512VL: %0:gr64 = COPY $rdi
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# AVX512VL-NEXT: %1:vr256x = VMOVUPSZ256rm %0, 1, $noreg, 0, $noreg :: (load 32 from %ir.p1, align 1)
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# AVX512VL-NEXT: $ymm0 = COPY %1
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# AVX512VL-NEXT: RET 0, implicit $ymm0
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body: |
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bb.1 (%ir-block.0):
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liveins: $rdi
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%0(p0) = COPY $rdi
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%1(<8 x s32>) = G_LOAD %0(p0) :: (load 32 from %ir.p1, align 1)
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$ymm0 = COPY %1(<8 x s32>)
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RET 0, implicit $ymm0
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...
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---
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name: test_load_v8i32_align
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# ALL-LABEL: name: test_load_v8i32_align
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alignment: 16
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legalized: true
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regBankSelected: true
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registers:
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- { id: 0, class: gpr }
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- { id: 1, class: vecr }
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# NO_AVX512F: %0:gr64 = COPY $rdi
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# NO_AVX512F-NEXT: %1:vr256 = VMOVAPSYrm %0, 1, $noreg, 0, $noreg :: (load 32 from %ir.p1)
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# NO_AVX512F-NEXT: $ymm0 = COPY %1
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# NO_AVX512F-NEXT: RET 0, implicit $ymm0
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#
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# AVX512F: %0:gr64 = COPY $rdi
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# AVX512F-NEXT: %1:vr256x = VMOVAPSZ256rm_NOVLX %0, 1, $noreg, 0, $noreg :: (load 32 from %ir.p1)
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# AVX512F-NEXT: $ymm0 = COPY %1
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# AVX512F-NEXT: RET 0, implicit $ymm0
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#
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# AVX512VL: %0:gr64 = COPY $rdi
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# AVX512VL-NEXT: %1:vr256x = VMOVAPSZ256rm %0, 1, $noreg, 0, $noreg :: (load 32 from %ir.p1)
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# AVX512VL-NEXT: $ymm0 = COPY %1
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# AVX512VL-NEXT: RET 0, implicit $ymm0
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body: |
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bb.1 (%ir-block.0):
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liveins: $rdi
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%0(p0) = COPY $rdi
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%1(<8 x s32>) = G_LOAD %0(p0) :: (load 32 from %ir.p1)
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$ymm0 = COPY %1(<8 x s32>)
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RET 0, implicit $ymm0
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...
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---
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name: test_store_v8i32_noalign
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# ALL-LABEL: name: test_store_v8i32_noalign
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alignment: 16
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legalized: true
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regBankSelected: true
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# NO_AVX512F: registers:
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# NO_AVX512F-NEXT: - { id: 0, class: vr256, preferred-register: '' }
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# NO_AVX512F-NEXT: - { id: 1, class: gr64, preferred-register: '' }
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#
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# AVX512ALL: registers:
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# AVX512ALL-NEXT: - { id: 0, class: vr256x, preferred-register: '' }
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# AVX512ALL-NEXT: - { id: 1, class: gr64, preferred-register: '' }
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registers:
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- { id: 0, class: vecr }
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- { id: 1, class: gpr }
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# NO_AVX512F: %0:vr256 = COPY $ymm0
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# NO_AVX512F-NEXT: %1:gr64 = COPY $rdi
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# NO_AVX512F-NEXT: VMOVUPSYmr %1, 1, $noreg, 0, $noreg, %0 :: (store 32 into %ir.p1, align 1)
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# NO_AVX512F-NEXT: RET 0
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#
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# AVX512F: %0:vr256x = COPY $ymm0
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# AVX512F-NEXT: %1:gr64 = COPY $rdi
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# AVX512F-NEXT: VMOVUPSZ256mr_NOVLX %1, 1, $noreg, 0, $noreg, %0 :: (store 32 into %ir.p1, align 1)
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# AVX512F-NEXT: RET 0
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#
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# AVX512VL: %0:vr256x = COPY $ymm0
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# AVX512VL-NEXT: %1:gr64 = COPY $rdi
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# AVX512VL-NEXT: VMOVUPSZ256mr %1, 1, $noreg, 0, $noreg, %0 :: (store 32 into %ir.p1, align 1)
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# AVX512VL-NEXT: RET 0
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body: |
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bb.1 (%ir-block.0):
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liveins: $rdi, $ymm0
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%0(<8 x s32>) = COPY $ymm0
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%1(p0) = COPY $rdi
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G_STORE %0(<8 x s32>), %1(p0) :: (store 32 into %ir.p1, align 1)
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RET 0
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...
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---
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name: test_store_v8i32_align
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# ALL-LABEL: name: test_store_v8i32_align
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alignment: 16
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legalized: true
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regBankSelected: true
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# NO_AVX512F: registers:
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# NO_AVX512F-NEXT: - { id: 0, class: vr256, preferred-register: '' }
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# NO_AVX512F-NEXT: - { id: 1, class: gr64, preferred-register: '' }
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#
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# AVX512ALL: registers:
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# AVX512ALL-NEXT: - { id: 0, class: vr256x, preferred-register: '' }
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# AVX512ALL-NEXT: - { id: 1, class: gr64, preferred-register: '' }
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registers:
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- { id: 0, class: vecr }
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- { id: 1, class: gpr }
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# NO_AVX512F: %0:vr256 = COPY $ymm0
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# NO_AVX512F-NEXT: %1:gr64 = COPY $rdi
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# NO_AVX512F-NEXT: VMOVAPSYmr %1, 1, $noreg, 0, $noreg, %0 :: (store 32 into %ir.p1)
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# NO_AVX512F-NEXT: RET 0
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#
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# AVX512F: %0:vr256x = COPY $ymm0
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# AVX512F-NEXT: %1:gr64 = COPY $rdi
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# AVX512F-NEXT: VMOVAPSZ256mr_NOVLX %1, 1, $noreg, 0, $noreg, %0 :: (store 32 into %ir.p1)
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# AVX512F-NEXT: RET 0
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#
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# AVX512VL: %0:vr256x = COPY $ymm0
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# AVX512VL-NEXT: %1:gr64 = COPY $rdi
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# AVX512VL-NEXT: VMOVAPSZ256mr %1, 1, $noreg, 0, $noreg, %0 :: (store 32 into %ir.p1)
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# AVX512VL-NEXT: RET 0
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body: |
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bb.1 (%ir-block.0):
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liveins: $rdi, $ymm0
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%0(<8 x s32>) = COPY $ymm0
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%1(p0) = COPY $rdi
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G_STORE %0(<8 x s32>), %1(p0) :: (store 32 into %ir.p1)
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RET 0
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...
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