483 lines
12 KiB
Plaintext
483 lines
12 KiB
Plaintext
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=x86_64-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=ALL
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--- |
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define i64 @test_lshr_i64(i64 %arg1, i64 %arg2) {
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%res = lshr i64 %arg1, %arg2
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ret i64 %res
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}
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define i64 @test_lshr_i64_imm(i64 %arg1) {
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%res = lshr i64 %arg1, 5
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ret i64 %res
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}
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define i64 @test_lshr_i64_imm1(i64 %arg1) {
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%res = lshr i64 %arg1, 1
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ret i64 %res
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}
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define i32 @test_lshr_i32(i32 %arg1, i32 %arg2) {
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%res = lshr i32 %arg1, %arg2
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ret i32 %res
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}
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define i32 @test_lshr_i32_imm(i32 %arg1) {
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%res = lshr i32 %arg1, 5
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ret i32 %res
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}
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define i32 @test_lshr_i32_imm1(i32 %arg1) {
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%res = lshr i32 %arg1, 1
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ret i32 %res
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}
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define i16 @test_lshr_i16(i32 %arg1, i32 %arg2) {
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%a = trunc i32 %arg1 to i16
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%a2 = trunc i32 %arg2 to i16
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%res = lshr i16 %a, %a2
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ret i16 %res
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}
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define i16 @test_lshr_i16_imm(i32 %arg1) {
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%a = trunc i32 %arg1 to i16
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%res = lshr i16 %a, 5
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ret i16 %res
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}
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define i16 @test_lshr_i16_imm1(i32 %arg1) {
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%a = trunc i32 %arg1 to i16
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%res = lshr i16 %a, 1
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ret i16 %res
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}
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define i8 @test_lshr_i8(i32 %arg1, i32 %arg2) {
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%a = trunc i32 %arg1 to i8
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%a2 = trunc i32 %arg2 to i8
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%res = lshr i8 %a, %a2
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ret i8 %res
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}
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define i8 @test_lshr_i8_imm(i32 %arg1) {
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%a = trunc i32 %arg1 to i8
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%res = lshr i8 %a, 5
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ret i8 %res
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}
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define i8 @test_lshr_i8_imm1(i32 %arg1) {
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%a = trunc i32 %arg1 to i8
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%res = lshr i8 %a, 1
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ret i8 %res
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}
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...
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---
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name: test_lshr_i64
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alignment: 16
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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registers:
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- { id: 0, class: gpr, preferred-register: '' }
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- { id: 1, class: gpr, preferred-register: '' }
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- { id: 2, class: gpr, preferred-register: '' }
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- { id: 3, class: gpr, preferred-register: '' }
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liveins:
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fixedStack:
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stack:
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constants:
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body: |
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bb.1 (%ir-block.0):
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liveins: $rdi, $rsi
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; ALL-LABEL: name: test_lshr_i64
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; ALL: liveins: $rdi, $rsi
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; ALL: [[COPY:%[0-9]+]]:gr64 = COPY $rdi
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; ALL: [[COPY1:%[0-9]+]]:gr64_with_sub_8bit = COPY $rsi
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; ALL: [[COPY2:%[0-9]+]]:gr8 = COPY [[COPY1]].sub_8bit
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; ALL: $cl = COPY [[COPY2]]
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; ALL: [[SHR64rCL:%[0-9]+]]:gr64 = SHR64rCL [[COPY]], implicit-def $eflags, implicit $cl
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; ALL: $rax = COPY [[SHR64rCL]]
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; ALL: RET 0, implicit $rax
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%0(s64) = COPY $rdi
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%1(s64) = COPY $rsi
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%2(s8) = G_TRUNC %1
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%3(s64) = G_LSHR %0, %2
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$rax = COPY %3(s64)
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RET 0, implicit $rax
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...
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---
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name: test_lshr_i64_imm
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alignment: 16
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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registers:
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- { id: 0, class: gpr, preferred-register: '' }
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- { id: 1, class: gpr, preferred-register: '' }
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- { id: 2, class: gpr, preferred-register: '' }
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liveins:
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fixedStack:
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stack:
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constants:
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body: |
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bb.1 (%ir-block.0):
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liveins: $rdi
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; ALL-LABEL: name: test_lshr_i64_imm
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; ALL: liveins: $rdi
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; ALL: [[COPY:%[0-9]+]]:gr64 = COPY $rdi
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; ALL: [[SHR64ri:%[0-9]+]]:gr64 = SHR64ri [[COPY]], 5, implicit-def $eflags
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; ALL: $rax = COPY [[SHR64ri]]
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; ALL: RET 0, implicit $rax
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%0(s64) = COPY $rdi
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%1(s8) = G_CONSTANT i8 5
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%2(s64) = G_LSHR %0, %1
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$rax = COPY %2(s64)
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RET 0, implicit $rax
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...
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---
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name: test_lshr_i64_imm1
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alignment: 16
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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registers:
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- { id: 0, class: gpr, preferred-register: '' }
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- { id: 1, class: gpr, preferred-register: '' }
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- { id: 2, class: gpr, preferred-register: '' }
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liveins:
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fixedStack:
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stack:
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constants:
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body: |
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bb.1 (%ir-block.0):
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liveins: $rdi
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; ALL-LABEL: name: test_lshr_i64_imm1
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; ALL: liveins: $rdi
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; ALL: [[COPY:%[0-9]+]]:gr64 = COPY $rdi
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; ALL: [[SHR64r1_:%[0-9]+]]:gr64 = SHR64r1 [[COPY]], implicit-def $eflags
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; ALL: $rax = COPY [[SHR64r1_]]
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; ALL: RET 0, implicit $rax
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%0(s64) = COPY $rdi
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%1(s8) = G_CONSTANT i8 1
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%2(s64) = G_LSHR %0, %1
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$rax = COPY %2(s64)
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RET 0, implicit $rax
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...
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---
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name: test_lshr_i32
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alignment: 16
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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registers:
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- { id: 0, class: gpr, preferred-register: '' }
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- { id: 1, class: gpr, preferred-register: '' }
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- { id: 2, class: gpr, preferred-register: '' }
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- { id: 3, class: gpr, preferred-register: '' }
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liveins:
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fixedStack:
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stack:
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constants:
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body: |
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bb.1 (%ir-block.0):
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liveins: $edi, $esi
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; ALL-LABEL: name: test_lshr_i32
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; ALL: liveins: $edi, $esi
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; ALL: [[COPY:%[0-9]+]]:gr32 = COPY $edi
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; ALL: [[COPY1:%[0-9]+]]:gr32 = COPY $esi
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; ALL: [[COPY2:%[0-9]+]]:gr8 = COPY [[COPY1]].sub_8bit
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; ALL: $cl = COPY [[COPY2]]
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; ALL: [[SHR32rCL:%[0-9]+]]:gr32 = SHR32rCL [[COPY]], implicit-def $eflags, implicit $cl
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; ALL: $eax = COPY [[SHR32rCL]]
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; ALL: RET 0, implicit $eax
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%0(s32) = COPY $edi
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%1(s32) = COPY $esi
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%2(s8) = G_TRUNC %1
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%3(s32) = G_LSHR %0, %2
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$eax = COPY %3(s32)
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RET 0, implicit $eax
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...
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---
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name: test_lshr_i32_imm
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alignment: 16
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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registers:
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- { id: 0, class: gpr, preferred-register: '' }
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- { id: 1, class: gpr, preferred-register: '' }
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- { id: 2, class: gpr, preferred-register: '' }
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liveins:
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fixedStack:
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stack:
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constants:
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body: |
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bb.1 (%ir-block.0):
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liveins: $edi
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; ALL-LABEL: name: test_lshr_i32_imm
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; ALL: liveins: $edi
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; ALL: [[COPY:%[0-9]+]]:gr32 = COPY $edi
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; ALL: [[SHR32ri:%[0-9]+]]:gr32 = SHR32ri [[COPY]], 5, implicit-def $eflags
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; ALL: $eax = COPY [[SHR32ri]]
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; ALL: RET 0, implicit $eax
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%0(s32) = COPY $edi
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%1(s8) = G_CONSTANT i8 5
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%2(s32) = G_LSHR %0, %1
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$eax = COPY %2(s32)
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RET 0, implicit $eax
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...
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---
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name: test_lshr_i32_imm1
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alignment: 16
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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registers:
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- { id: 0, class: gpr, preferred-register: '' }
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- { id: 1, class: gpr, preferred-register: '' }
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- { id: 2, class: gpr, preferred-register: '' }
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liveins:
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fixedStack:
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stack:
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constants:
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body: |
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bb.1 (%ir-block.0):
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liveins: $edi
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; ALL-LABEL: name: test_lshr_i32_imm1
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; ALL: liveins: $edi
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; ALL: [[COPY:%[0-9]+]]:gr32 = COPY $edi
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; ALL: [[SHR32r1_:%[0-9]+]]:gr32 = SHR32r1 [[COPY]], implicit-def $eflags
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; ALL: $eax = COPY [[SHR32r1_]]
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; ALL: RET 0, implicit $eax
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%0(s32) = COPY $edi
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%1(s8) = G_CONSTANT i8 1
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%2(s32) = G_LSHR %0, %1
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$eax = COPY %2(s32)
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RET 0, implicit $eax
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...
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---
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name: test_lshr_i16
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alignment: 16
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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registers:
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- { id: 0, class: gpr, preferred-register: '' }
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- { id: 1, class: gpr, preferred-register: '' }
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- { id: 2, class: gpr, preferred-register: '' }
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- { id: 3, class: gpr, preferred-register: '' }
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- { id: 4, class: gpr, preferred-register: '' }
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liveins:
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fixedStack:
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stack:
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constants:
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body: |
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bb.1 (%ir-block.0):
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liveins: $edi, $esi
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; ALL-LABEL: name: test_lshr_i16
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; ALL: liveins: $edi, $esi
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; ALL: [[COPY:%[0-9]+]]:gr32 = COPY $edi
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; ALL: [[COPY1:%[0-9]+]]:gr32 = COPY $esi
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; ALL: [[COPY2:%[0-9]+]]:gr16 = COPY [[COPY]].sub_16bit
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; ALL: [[COPY3:%[0-9]+]]:gr8 = COPY [[COPY1]].sub_8bit
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; ALL: $cl = COPY [[COPY3]]
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; ALL: [[SHR16rCL:%[0-9]+]]:gr16 = SHR16rCL [[COPY2]], implicit-def $eflags, implicit $cl
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; ALL: $ax = COPY [[SHR16rCL]]
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; ALL: RET 0, implicit $ax
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%0(s32) = COPY $edi
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%1(s32) = COPY $esi
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%2(s16) = G_TRUNC %0(s32)
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%3(s8) = G_TRUNC %1(s32)
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%4(s16) = G_LSHR %2, %3
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$ax = COPY %4(s16)
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RET 0, implicit $ax
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...
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---
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name: test_lshr_i16_imm
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alignment: 16
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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registers:
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- { id: 0, class: gpr, preferred-register: '' }
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- { id: 1, class: gpr, preferred-register: '' }
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- { id: 2, class: gpr, preferred-register: '' }
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- { id: 3, class: gpr, preferred-register: '' }
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liveins:
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fixedStack:
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stack:
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constants:
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body: |
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bb.1 (%ir-block.0):
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liveins: $edi
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; ALL-LABEL: name: test_lshr_i16_imm
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; ALL: liveins: $edi
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; ALL: [[COPY:%[0-9]+]]:gr32 = COPY $edi
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; ALL: [[COPY1:%[0-9]+]]:gr16 = COPY [[COPY]].sub_16bit
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; ALL: [[SHR16ri:%[0-9]+]]:gr16 = SHR16ri [[COPY1]], 5, implicit-def $eflags
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; ALL: $ax = COPY [[SHR16ri]]
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; ALL: RET 0, implicit $ax
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%0(s32) = COPY $edi
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%2(s8) = G_CONSTANT i8 5
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%1(s16) = G_TRUNC %0(s32)
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%3(s16) = G_LSHR %1, %2
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$ax = COPY %3(s16)
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RET 0, implicit $ax
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...
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---
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name: test_lshr_i16_imm1
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alignment: 16
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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registers:
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||
|
|
- { id: 0, class: gpr, preferred-register: '' }
|
||
|
|
- { id: 1, class: gpr, preferred-register: '' }
|
||
|
|
- { id: 2, class: gpr, preferred-register: '' }
|
||
|
|
- { id: 3, class: gpr, preferred-register: '' }
|
||
|
|
liveins:
|
||
|
|
fixedStack:
|
||
|
|
stack:
|
||
|
|
constants:
|
||
|
|
body: |
|
||
|
|
bb.1 (%ir-block.0):
|
||
|
|
liveins: $edi
|
||
|
|
|
||
|
|
; ALL-LABEL: name: test_lshr_i16_imm1
|
||
|
|
; ALL: liveins: $edi
|
||
|
|
; ALL: [[COPY:%[0-9]+]]:gr32 = COPY $edi
|
||
|
|
; ALL: [[COPY1:%[0-9]+]]:gr16 = COPY [[COPY]].sub_16bit
|
||
|
|
; ALL: [[SHR16r1_:%[0-9]+]]:gr16 = SHR16r1 [[COPY1]], implicit-def $eflags
|
||
|
|
; ALL: $ax = COPY [[SHR16r1_]]
|
||
|
|
; ALL: RET 0, implicit $ax
|
||
|
|
%0(s32) = COPY $edi
|
||
|
|
%2(s8) = G_CONSTANT i8 1
|
||
|
|
%1(s16) = G_TRUNC %0(s32)
|
||
|
|
%3(s16) = G_LSHR %1, %2
|
||
|
|
$ax = COPY %3(s16)
|
||
|
|
RET 0, implicit $ax
|
||
|
|
|
||
|
|
...
|
||
|
|
---
|
||
|
|
name: test_lshr_i8
|
||
|
|
alignment: 16
|
||
|
|
legalized: true
|
||
|
|
regBankSelected: true
|
||
|
|
tracksRegLiveness: true
|
||
|
|
registers:
|
||
|
|
- { id: 0, class: gpr, preferred-register: '' }
|
||
|
|
- { id: 1, class: gpr, preferred-register: '' }
|
||
|
|
- { id: 2, class: gpr, preferred-register: '' }
|
||
|
|
- { id: 3, class: gpr, preferred-register: '' }
|
||
|
|
- { id: 4, class: gpr, preferred-register: '' }
|
||
|
|
liveins:
|
||
|
|
fixedStack:
|
||
|
|
stack:
|
||
|
|
constants:
|
||
|
|
body: |
|
||
|
|
bb.1 (%ir-block.0):
|
||
|
|
liveins: $edi, $esi
|
||
|
|
|
||
|
|
; ALL-LABEL: name: test_lshr_i8
|
||
|
|
; ALL: liveins: $edi, $esi
|
||
|
|
; ALL: [[COPY:%[0-9]+]]:gr32 = COPY $edi
|
||
|
|
; ALL: [[COPY1:%[0-9]+]]:gr32 = COPY $esi
|
||
|
|
; ALL: [[COPY2:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit
|
||
|
|
; ALL: [[COPY3:%[0-9]+]]:gr8 = COPY [[COPY1]].sub_8bit
|
||
|
|
; ALL: $cl = COPY [[COPY3]]
|
||
|
|
; ALL: [[SHR8rCL:%[0-9]+]]:gr8 = SHR8rCL [[COPY2]], implicit-def $eflags, implicit $cl
|
||
|
|
; ALL: $al = COPY [[SHR8rCL]]
|
||
|
|
; ALL: RET 0, implicit $al
|
||
|
|
%0(s32) = COPY $edi
|
||
|
|
%1(s32) = COPY $esi
|
||
|
|
%2(s8) = G_TRUNC %0(s32)
|
||
|
|
%3(s8) = G_TRUNC %1(s32)
|
||
|
|
%4(s8) = G_LSHR %2, %3
|
||
|
|
$al = COPY %4(s8)
|
||
|
|
RET 0, implicit $al
|
||
|
|
|
||
|
|
...
|
||
|
|
---
|
||
|
|
name: test_lshr_i8_imm
|
||
|
|
alignment: 16
|
||
|
|
legalized: true
|
||
|
|
regBankSelected: true
|
||
|
|
tracksRegLiveness: true
|
||
|
|
registers:
|
||
|
|
- { id: 0, class: gpr, preferred-register: '' }
|
||
|
|
- { id: 1, class: gpr, preferred-register: '' }
|
||
|
|
- { id: 2, class: gpr, preferred-register: '' }
|
||
|
|
- { id: 3, class: gpr, preferred-register: '' }
|
||
|
|
liveins:
|
||
|
|
fixedStack:
|
||
|
|
stack:
|
||
|
|
constants:
|
||
|
|
body: |
|
||
|
|
bb.1 (%ir-block.0):
|
||
|
|
liveins: $edi
|
||
|
|
|
||
|
|
; ALL-LABEL: name: test_lshr_i8_imm
|
||
|
|
; ALL: liveins: $edi
|
||
|
|
; ALL: [[COPY:%[0-9]+]]:gr32 = COPY $edi
|
||
|
|
; ALL: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit
|
||
|
|
; ALL: [[SHR8ri:%[0-9]+]]:gr8 = SHR8ri [[COPY1]], 5, implicit-def $eflags
|
||
|
|
; ALL: $al = COPY [[SHR8ri]]
|
||
|
|
; ALL: RET 0, implicit $al
|
||
|
|
%0(s32) = COPY $edi
|
||
|
|
%2(s8) = G_CONSTANT i8 5
|
||
|
|
%1(s8) = G_TRUNC %0(s32)
|
||
|
|
%3(s8) = G_LSHR %1, %2
|
||
|
|
$al = COPY %3(s8)
|
||
|
|
RET 0, implicit $al
|
||
|
|
|
||
|
|
...
|
||
|
|
---
|
||
|
|
name: test_lshr_i8_imm1
|
||
|
|
alignment: 16
|
||
|
|
legalized: true
|
||
|
|
regBankSelected: true
|
||
|
|
tracksRegLiveness: true
|
||
|
|
registers:
|
||
|
|
- { id: 0, class: gpr, preferred-register: '' }
|
||
|
|
- { id: 1, class: gpr, preferred-register: '' }
|
||
|
|
- { id: 2, class: gpr, preferred-register: '' }
|
||
|
|
- { id: 3, class: gpr, preferred-register: '' }
|
||
|
|
liveins:
|
||
|
|
fixedStack:
|
||
|
|
stack:
|
||
|
|
constants:
|
||
|
|
body: |
|
||
|
|
bb.1 (%ir-block.0):
|
||
|
|
liveins: $edi
|
||
|
|
|
||
|
|
; ALL-LABEL: name: test_lshr_i8_imm1
|
||
|
|
; ALL: liveins: $edi
|
||
|
|
; ALL: [[COPY:%[0-9]+]]:gr32 = COPY $edi
|
||
|
|
; ALL: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit
|
||
|
|
; ALL: [[SHR8r1_:%[0-9]+]]:gr8 = SHR8r1 [[COPY1]], implicit-def $eflags
|
||
|
|
; ALL: $al = COPY [[SHR8r1_]]
|
||
|
|
; ALL: RET 0, implicit $al
|
||
|
|
%0(s32) = COPY $edi
|
||
|
|
%2(s8) = G_CONSTANT i8 1
|
||
|
|
%1(s8) = G_TRUNC %0(s32)
|
||
|
|
%3(s8) = G_LSHR %1, %2
|
||
|
|
$al = COPY %3(s8)
|
||
|
|
RET 0, implicit $al
|
||
|
|
|
||
|
|
...
|