llvm-for-llvmta/test/CodeGen/X86/GlobalISel/select-ext.mir

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2022-04-25 10:02:23 +02:00
# RUN: llc -mtriple=i386-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=X32
# RUN: llc -mtriple=x86_64-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=X64
--- |
define i8 @test_zext_i1toi8(i1 %a) {
%r = zext i1 %a to i8
ret i8 %r
}
define i16 @test_zext_i1toi16(i1 %a) {
%r = zext i1 %a to i16
ret i16 %r
}
define i32 @test_zext_i1(i1 %a) {
%r = zext i1 %a to i32
ret i32 %r
}
define i32 @test_zext_i8(i8 %val) {
%r = zext i8 %val to i32
ret i32 %r
}
define i32 @test_zext_i16(i16 %val) {
%r = zext i16 %val to i32
ret i32 %r
}
define i32 @test_sext_i8(i8 %val) {
%r = sext i8 %val to i32
ret i32 %r
}
define i32 @test_sext_i16(i16 %val) {
%r = sext i16 %val to i32
ret i32 %r
}
define void @test_anyext_i1toi8() { ret void }
define void @test_anyext_i1toi16() { ret void }
define void @test_anyext_i1toi32() { ret void }
define void @test_anyext_i8toi16() { ret void }
define void @test_anyext_i8toi32() { ret void }
define void @test_anyext_i16toi32() { ret void }
...
---
name: test_zext_i1toi8
# ALL-LABEL: name: test_zext_i1toi8
alignment: 16
legalized: true
regBankSelected: true
# X32: registers:
# X32-NEXT: - { id: 0, class: gr32_abcd, preferred-register: '' }
# X32-NEXT: - { id: 1, class: gr8, preferred-register: '' }
# X32-NEXT: - { id: 2, class: gr8, preferred-register: '' }
#
# X64: registers:
# X64-NEXT: - { id: 0, class: gr32, preferred-register: '' }
# X64-NEXT: - { id: 1, class: gr8, preferred-register: '' }
# X64-NEXT: - { id: 2, class: gr8, preferred-register: '' }
registers:
- { id: 0, class: gpr, preferred-register: '' }
- { id: 1, class: gpr, preferred-register: '' }
- { id: 2, class: gpr, preferred-register: '' }
# X32: %0:gr32_abcd = COPY $edi
# X64: %0:gr32 = COPY $edi
# ALL_NEXT: %1:gr8 = COPY %0.sub_8bit
# ALL_NEXT: %2:gr8 = AND8ri %1, 1, implicit-def $eflags
# ALL_NEXT: $al = COPY %2
# ALL_NEXT: RET 0, implicit $al
body: |
bb.1 (%ir-block.0):
liveins: $edi
%0(s32) = COPY $edi
%1(s1) = G_TRUNC %0(s32)
%2(s8) = G_ZEXT %1(s1)
$al = COPY %2(s8)
RET 0, implicit $al
...
---
name: test_zext_i1toi16
# ALL-LABEL: name: test_zext_i1toi16
alignment: 16
legalized: true
regBankSelected: true
# X32: registers:
# X32-NEXT: - { id: 0, class: gr32_abcd, preferred-register: '' }
# X32-NEXT: - { id: 1, class: gr8, preferred-register: '' }
# X32-NEXT: - { id: 2, class: gr16, preferred-register: '' }
# X32-NEXT: - { id: 3, class: gr16, preferred-register: '' }
#
# X64: registers:
# X64-NEXT: - { id: 0, class: gr32, preferred-register: '' }
# X64-NEXT: - { id: 1, class: gr8, preferred-register: '' }
# X64-NEXT: - { id: 2, class: gr16, preferred-register: '' }
# X64-NEXT: - { id: 3, class: gr16, preferred-register: '' }
registers:
- { id: 0, class: gpr, preferred-register: '' }
- { id: 1, class: gpr, preferred-register: '' }
- { id: 2, class: gpr, preferred-register: '' }
# X32: %0:gr32_abcd = COPY $edi
# X64: %0:gr32 = COPY $edi
# ALL_NEXT: %1:gr8 = COPY %0.sub_8bit
# ALL_NEXT: %3:gr16 = SUBREG_TO_REG 0, %1, %subreg.sub_8bit
# ALL_NEXT: %2:gr16 = AND16ri8 %3, 1, implicit-def $eflags
# ALL_NEXT: $ax = COPY %2
# ALL_NEXT: RET 0, implicit $ax
body: |
bb.1 (%ir-block.0):
liveins: $edi
%0(s32) = COPY $edi
%1(s1) = G_TRUNC %0(s32)
%2(s16) = G_ZEXT %1(s1)
$ax = COPY %2(s16)
RET 0, implicit $ax
...
---
name: test_zext_i1
# ALL-LABEL: name: test_zext_i1
alignment: 16
legalized: true
regBankSelected: true
# X32: registers:
# X32-NEXT: - { id: 0, class: gr32_abcd, preferred-register: '' }
# X32-NEXT: - { id: 1, class: gr8, preferred-register: '' }
# X32-NEXT: - { id: 2, class: gr32, preferred-register: '' }
# X32-NEXT: - { id: 3, class: gr32, preferred-register: '' }
#
# X64: registers:
# X64-NEXT: - { id: 0, class: gr32, preferred-register: '' }
# X64-NEXT: - { id: 1, class: gr8, preferred-register: '' }
# X64-NEXT: - { id: 2, class: gr32, preferred-register: '' }
# X64-NEXT: - { id: 3, class: gr32, preferred-register: '' }
registers:
- { id: 0, class: gpr }
- { id: 1, class: gpr }
- { id: 2, class: gpr }
# X32: %0:gr32_abcd = COPY $edi
# X64: %0:gr32 = COPY $edi
# ALL_NEXT: %1:gr8 = COPY %0.sub_8bit
# ALL_NEXT: %3:gr32 = SUBREG_TO_REG 0, %1, %subreg.sub_8bit
# ALL_NEXT: %2:gr32 = AND32ri8 %3, 1, implicit-def $eflags
# ALL_NEXT: $eax = COPY %2
# ALL_NEXT: RET 0, implicit $eax
body: |
bb.1 (%ir-block.0):
liveins: $edi
%0(s32) = COPY $edi
%1(s1) = G_TRUNC %0(s32)
%2(s32) = G_ZEXT %1(s1)
$eax = COPY %2(s32)
RET 0, implicit $eax
...
---
name: test_zext_i8
# ALL-LABEL: name: test_zext_i8
alignment: 16
legalized: true
regBankSelected: true
# ALL: registers:
# ALL-NEXT: - { id: 0, class: gr8, preferred-register: '' }
# ALL-NEXT: - { id: 1, class: gr32, preferred-register: '' }
registers:
- { id: 0, class: gpr }
- { id: 1, class: gpr }
# ALL: %0:gr8 = COPY $dil
# ALL-NEXT: %1:gr32 = MOVZX32rr8 %0
# ALL-NEXT: $eax = COPY %1
# ALL-NEXT: RET 0, implicit $eax
body: |
bb.1 (%ir-block.0):
liveins: $edi
%0(s8) = COPY $dil
%1(s32) = G_ZEXT %0(s8)
$eax = COPY %1(s32)
RET 0, implicit $eax
...
---
name: test_zext_i16
# ALL-LABEL: name: test_zext_i16
alignment: 16
legalized: true
regBankSelected: true
# ALL: registers:
# ALL-NEXT: - { id: 0, class: gr16, preferred-register: '' }
# ALL-NEXT: - { id: 1, class: gr32, preferred-register: '' }
registers:
- { id: 0, class: gpr }
- { id: 1, class: gpr }
# ALL: %0:gr16 = COPY $di
# ALL-NEXT: %1:gr32 = MOVZX32rr16 %0
# ALL-NEXT: $eax = COPY %1
# ALL-NEXT: RET 0, implicit $eax
body: |
bb.1 (%ir-block.0):
liveins: $edi
%0(s16) = COPY $di
%1(s32) = G_ZEXT %0(s16)
$eax = COPY %1(s32)
RET 0, implicit $eax
...
---
name: test_sext_i8
# ALL-LABEL: name: test_sext_i8
alignment: 16
legalized: true
regBankSelected: true
# ALL: registers:
# ALL-NEXT: - { id: 0, class: gr8, preferred-register: '' }
# ALL-NEXT: - { id: 1, class: gr32, preferred-register: '' }
registers:
- { id: 0, class: gpr }
- { id: 1, class: gpr }
# ALL: %0:gr8 = COPY $dil
# ALL-NEXT: %1:gr32 = MOVSX32rr8 %0
# ALL-NEXT: $eax = COPY %1
# ALL-NEXT: RET 0, implicit $eax
body: |
bb.1 (%ir-block.0):
liveins: $edi
%0(s8) = COPY $dil
%1(s32) = G_SEXT %0(s8)
$eax = COPY %1(s32)
RET 0, implicit $eax
...
---
name: test_sext_i16
# ALL-LABEL: name: test_sext_i16
alignment: 16
legalized: true
regBankSelected: true
# ALL: registers:
# ALL-NEXT: - { id: 0, class: gr16, preferred-register: '' }
# ALL-NEXT: - { id: 1, class: gr32, preferred-register: '' }
registers:
- { id: 0, class: gpr }
- { id: 1, class: gpr }
# ALL: %0:gr16 = COPY $di
# ALL-NEXT: %1:gr32 = MOVSX32rr16 %0
# ALL-NEXT: $eax = COPY %1
# ALL-NEXT: RET 0, implicit $eax
body: |
bb.1 (%ir-block.0):
liveins: $edi
%0(s16) = COPY $di
%1(s32) = G_SEXT %0(s16)
$eax = COPY %1(s32)
RET 0, implicit $eax
...
---
name: test_anyext_i1toi8
# ALL-LABEL: name: test_anyext_i1toi8
alignment: 16
legalized: true
regBankSelected: true
# X32: registers:
# X32-NEXT: - { id: 0, class: gr32_abcd, preferred-register: '' }
# X32-NEXT: - { id: 1, class: gr8, preferred-register: '' }
# X32-NEXT: - { id: 2, class: gr8, preferred-register: '' }
#
# X64: registers:
# X64-NEXT: - { id: 0, class: gr32, preferred-register: '' }
# X64-NEXT: - { id: 1, class: gr8, preferred-register: '' }
# X64-NEXT: - { id: 2, class: gr8, preferred-register: '' }
registers:
- { id: 0, class: gpr }
- { id: 1, class: gpr }
- { id: 2, class: gpr }
# X32: %0:gr32_abcd = COPY $edi
# X64: %0:gr32 = COPY $edi
# ALL-NEXT: %1:gr8 = COPY %0.sub_8bit
# ALL-NEXT: $al = COPY %1
# ALL-NEXT: RET 0, implicit $al
body: |
bb.1 (%ir-block.0):
liveins: $edi
%0(s32) = COPY $edi
%1(s1) = G_TRUNC %0(s32)
%2(s8) = G_ANYEXT %1(s1)
$al = COPY %2(s8)
RET 0, implicit $al
...
---
name: test_anyext_i1toi16
# ALL-LABEL: name: test_anyext_i1toi16
alignment: 16
legalized: true
regBankSelected: true
# X32: registers:
# X32-NEXT: - { id: 0, class: gr32_abcd, preferred-register: '' }
# X32-NEXT: - { id: 1, class: gr8, preferred-register: '' }
# X32-NEXT: - { id: 2, class: gr16, preferred-register: '' }
#
# X64: registers:
# X64-NEXT: - { id: 0, class: gr32, preferred-register: '' }
# X64-NEXT: - { id: 1, class: gr8, preferred-register: '' }
# X64-NEXT: - { id: 2, class: gr16, preferred-register: '' }
registers:
- { id: 0, class: gpr }
- { id: 1, class: gpr }
- { id: 2, class: gpr }
# X32: %0:gr32_abcd = COPY $edi
# X64: %0:gr32 = COPY $edi
# ALL-NEXT: %1:gr8 = COPY %0.sub_8bit
# ALL-NEXT: %2:gr16 = SUBREG_TO_REG 0, %1, %subreg.sub_8bit
# ALL-NEXT: $ax = COPY %2
# ALL-NEXT: RET 0, implicit $ax
body: |
bb.1 (%ir-block.0):
liveins: $edi
%0(s32) = COPY $edi
%1(s1) = G_TRUNC %0(s32)
%2(s16) = G_ANYEXT %1(s1)
$ax = COPY %2(s16)
RET 0, implicit $ax
...
---
name: test_anyext_i1toi32
# ALL-LABEL: name: test_anyext_i1toi32
alignment: 16
legalized: true
regBankSelected: true
# X32: registers:
# X32-NEXT: - { id: 0, class: gr32_abcd, preferred-register: '' }
# X32-NEXT: - { id: 1, class: gr8, preferred-register: '' }
# X32-NEXT: - { id: 2, class: gr32, preferred-register: '' }
#
# X64: registers:
# X64-NEXT: - { id: 0, class: gr32, preferred-register: '' }
# X64-NEXT: - { id: 1, class: gr8, preferred-register: '' }
# X64-NEXT: - { id: 2, class: gr32, preferred-register: '' }
registers:
- { id: 0, class: gpr }
- { id: 1, class: gpr }
- { id: 2, class: gpr }
# X32: %0:gr32_abcd = COPY $edi
# X64: %0:gr32 = COPY $edi
# ALL-NEXT: %1:gr8 = COPY %0.sub_8bit
# ALL-NEXT: %2:gr32 = SUBREG_TO_REG 0, %1, %subreg.sub_8bit
# ALL-NEXT: $eax = COPY %2
# ALL-NEXT: RET 0, implicit $eax
body: |
bb.1 (%ir-block.0):
liveins: $edi
%0(s32) = COPY $edi
%1(s1) = G_TRUNC %0(s32)
%2(s32) = G_ANYEXT %1(s1)
$eax = COPY %2(s32)
RET 0, implicit $eax
...
---
name: test_anyext_i8toi16
# ALL-LABEL: name: test_anyext_i8toi16
alignment: 16
legalized: true
regBankSelected: true
# X32: registers:
# X32-NEXT: - { id: 0, class: gr32, preferred-register: '' }
# X32-NEXT: - { id: 1, class: gr8_abcd_l, preferred-register: '' }
# X32-NEXT: - { id: 2, class: gr16, preferred-register: '' }
#
# X64: registers:
# X64-NEXT: - { id: 0, class: gr32, preferred-register: '' }
# X64-NEXT: - { id: 1, class: gr8, preferred-register: '' }
# X64-NEXT: - { id: 2, class: gr16, preferred-register: '' }
registers:
- { id: 0, class: gpr }
- { id: 1, class: gpr }
- { id: 2, class: gpr }
# X32: %0:gr32 = COPY $edi
# X32-NEXT: %4:gr32_abcd = COPY %0
# X32-NEXT: %1:gr8_abcd_l = COPY %4.sub_8bit
# X64: %0:gr32 = COPY $edi
# X64-NEXT: %1:gr8 = COPY %0.sub_8bit
# ALL-NEXT: %3:gr32 = MOVZX32rr8 %1
# ALL-NEXT: %2:gr16 = COPY %3.sub_16bit
# ALL-NEXT: $ax = COPY %2
# ALL-NEXT: RET 0, implicit $ax
body: |
bb.1 (%ir-block.0):
liveins: $edi
%0(s32) = COPY $edi
%1(s8) = G_TRUNC %0(s32)
%2(s16) = G_ANYEXT %1(s8)
$ax = COPY %2(s16)
RET 0, implicit $ax
...
---
name: test_anyext_i8toi32
# ALL-LABEL: name: test_anyext_i8toi32
alignment: 16
legalized: true
regBankSelected: true
# X32: registers:
# X32-NEXT: - { id: 0, class: gr32, preferred-register: '' }
# X32-NEXT: - { id: 1, class: gr8_abcd_l, preferred-register: '' }
# X32-NEXT: - { id: 2, class: gr32, preferred-register: '' }
#
# X64: registers:
# X64-NEXT: - { id: 0, class: gr32, preferred-register: '' }
# X64-NEXT: - { id: 1, class: gr8, preferred-register: '' }
# X64-NEXT: - { id: 2, class: gr32, preferred-register: '' }
registers:
- { id: 0, class: gpr }
- { id: 1, class: gpr }
- { id: 2, class: gpr }
# X32: %0:gr32 = COPY $edi
# X32-NEXT: %3:gr32_abcd = COPY %0
# X32-NEXT: %1:gr8_abcd_l = COPY %3.sub_8bit
# X64: %0:gr32 = COPY $edi
# X64-NEXT: %1:gr8 = COPY %0.sub_8bit
# ALL-NEXT: %2:gr32 = MOVZX32rr8 %1
# ALL-NEXT: $eax = COPY %2
# ALL-NEXT: RET 0, implicit $eax
body: |
bb.1 (%ir-block.0):
liveins: $edi
%0(s32) = COPY $edi
%1(s8) = G_TRUNC %0(s32)
%2(s32) = G_ANYEXT %1(s8)
$eax = COPY %2(s32)
RET 0, implicit $eax
...
---
name: test_anyext_i16toi32
# ALL-LABEL: name: test_anyext_i16toi32
alignment: 16
legalized: true
regBankSelected: true
# ALL: registers:
# ALL-NEXT: - { id: 0, class: gr32, preferred-register: '' }
# ALL-NEXT: - { id: 1, class: gr16, preferred-register: '' }
# ALL-NEXT: - { id: 2, class: low32_addr_access_rbp, preferred-register: '' }
# ALL-NEXT: - { id: 3, class: low32_addr_access_rbp, preferred-register: '' }
registers:
- { id: 0, class: gpr }
- { id: 1, class: gpr }
- { id: 2, class: gpr }
# ALL: %0:gr32 = COPY $edi
# ALL-NEXT: %1:gr16 = COPY %0.sub_16bit
# ALL-NEXT: %3:low32_addr_access_rbp = IMPLICIT_DEF
# ALL-NEXT: %2:low32_addr_access_rbp = INSERT_SUBREG %3, %1, %subreg.sub_16bit
# ALL-NEXT: $eax = COPY %2
# ALL-NEXT: RET 0, implicit $eax
body: |
bb.1 (%ir-block.0):
liveins: $edi
%0(s32) = COPY $edi
%1(s16) = G_TRUNC %0(s32)
%2(s32) = G_ANYEXT %1(s16)
$eax = COPY %2(s32)
RET 0, implicit $eax
...