120 lines
4.0 KiB
Plaintext
120 lines
4.0 KiB
Plaintext
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -O0 -mtriple=x86_64-linux-gnu -run-pass=legalizer %s -o - | FileCheck %s --check-prefix=X64
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# RUN: llc -O0 -mtriple=i386-linux-gnu -run-pass=legalizer -global-isel-abort=2 -pass-remarks-missed='gisel*' %s 2>%t -o - | FileCheck %s --check-prefix=X32
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# RUN: FileCheck -check-prefix=ERR32 %s < %t
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# ERR32: remark: <unknown>:0:0: unable to legalize instruction: %7:_(s32), %8:_(s1) = G_UADDO %3:_, %5:_ (in function: test_add_i64)
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--- |
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define void @test_add_i1() { ret void}
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define void @test_add_i32() { ret void }
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define void @test_add_i64() { ret void }
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...
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---
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name: test_add_i1
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# CHECK-LABEL: name: test_add_i1
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alignment: 16
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legalized: false
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regBankSelected: false
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registers:
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- { id: 0, class: _, preferred-register: '' }
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- { id: 1, class: _, preferred-register: '' }
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- { id: 2, class: _, preferred-register: '' }
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# CHECK: %0(s32) = COPY $edx
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# CHECK-NEXT: %3(s8) = G_TRUNC %0(s32)
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# CHECK-NEXT: %4(s8) = G_TRUNC %0(s32)
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# CHECK-NEXT: %5(s8) = G_ADD %3, %4
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# CHECK: RET 0
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body: |
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bb.1 (%ir-block.0):
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; X64-LABEL: name: test_add_i1
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; X64: [[COPY:%[0-9]+]]:_(s32) = COPY $edx
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; X64: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY]](s32)
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; X64: [[TRUNC1:%[0-9]+]]:_(s8) = G_TRUNC [[COPY]](s32)
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; X64: [[ADD:%[0-9]+]]:_(s8) = G_ADD [[TRUNC]], [[TRUNC1]]
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; X64: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[ADD]](s8)
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; X64: $eax = COPY [[ANYEXT]](s32)
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; X64: RET 0
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; X32-LABEL: name: test_add_i1
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; X32: [[COPY:%[0-9]+]]:_(s32) = COPY $edx
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; X32: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY]](s32)
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; X32: [[TRUNC1:%[0-9]+]]:_(s8) = G_TRUNC [[COPY]](s32)
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; X32: [[ADD:%[0-9]+]]:_(s8) = G_ADD [[TRUNC]], [[TRUNC1]]
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; X32: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[ADD]](s8)
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; X32: $eax = COPY [[ANYEXT]](s32)
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; X32: RET 0
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%0(s32) = COPY $edx
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%1(s1) = G_TRUNC %0(s32)
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%2(s1) = G_ADD %1, %1
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%3:_(s32) = G_ANYEXT %2
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$eax = COPY %3
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RET 0
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...
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---
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name: test_add_i32
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alignment: 16
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legalized: false
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regBankSelected: false
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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- { id: 2, class: _ }
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body: |
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bb.1 (%ir-block.0):
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; X64-LABEL: name: test_add_i32
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; X64: [[DEF:%[0-9]+]]:_(s32) = IMPLICIT_DEF
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; X64: [[DEF1:%[0-9]+]]:_(s32) = IMPLICIT_DEF
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; X64: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF1]]
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; X64: $eax = COPY [[ADD]](s32)
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; X64: RET 0
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; X32-LABEL: name: test_add_i32
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; X32: [[DEF:%[0-9]+]]:_(s32) = IMPLICIT_DEF
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; X32: [[DEF1:%[0-9]+]]:_(s32) = IMPLICIT_DEF
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; X32: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[DEF]], [[DEF1]]
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; X32: $eax = COPY [[ADD]](s32)
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; X32: RET 0
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%0(s32) = IMPLICIT_DEF
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%1(s32) = IMPLICIT_DEF
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%2(s32) = G_ADD %0, %1
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$eax = COPY %2
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RET 0
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...
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---
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name: test_add_i64
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alignment: 16
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legalized: false
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regBankSelected: false
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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- { id: 2, class: _ }
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body: |
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bb.1 (%ir-block.0):
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; X64-LABEL: name: test_add_i64
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; X64: [[DEF:%[0-9]+]]:_(s64) = IMPLICIT_DEF
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; X64: [[DEF1:%[0-9]+]]:_(s64) = IMPLICIT_DEF
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; X64: [[ADD:%[0-9]+]]:_(s64) = G_ADD [[DEF]], [[DEF1]]
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; X64: $rax = COPY [[ADD]](s64)
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; X64: RET 0
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; X32-LABEL: name: test_add_i64
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; X32: [[DEF:%[0-9]+]]:_(s64) = IMPLICIT_DEF
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; X32: [[DEF1:%[0-9]+]]:_(s64) = IMPLICIT_DEF
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; X32: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[DEF]](s64)
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; X32: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[DEF1]](s64)
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; X32: [[UADDO:%[0-9]+]]:_(s32), [[UADDO1:%[0-9]+]]:_(s1) = G_UADDO [[UV]], [[UV2]]
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; X32: [[UADDE:%[0-9]+]]:_(s32), [[UADDE1:%[0-9]+]]:_(s1) = G_UADDE [[UV1]], [[UV3]], [[UADDO1]]
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; X32: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[UADDO]](s32), [[UADDE]](s32)
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; X32: $rax = COPY [[MV]](s64)
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; X32: RET 0
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%0(s64) = IMPLICIT_DEF
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%1(s64) = IMPLICIT_DEF
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%2(s64) = G_ADD %0, %1
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$rax = COPY %2
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RET 0
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...
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