llvm-for-llvmta/test/CodeGen/X86/GlobalISel/fconstant.ll

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2022-04-25 10:02:23 +02:00
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=x86_64-linux-gnu -mattr=+sse2 -global-isel -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK64_SMALL
; RUN: llc -mtriple=x86_64-linux-gnu -mattr=+sse2 -global-isel -code-model=large -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK64_LARGE
; RUN: llc -mtriple=i386-linux-gnu -mattr=+sse2 -global-isel -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK32
; RUN: llc -mtriple=i386-linux-gnu -mattr=+sse2 -global-isel -code-model=large -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK32
; RUN: llc -mtriple=x86_64-linux-gnu -mattr=+sse2 -global-isel -relocation-model=pic -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK64_SMALL
define void @test_float(float* %a , float %b) {
; CHECK64_SMALL-LABEL: test_float:
; CHECK64_SMALL: # %bb.0: # %entry
; CHECK64_SMALL-NEXT: movss .LCPI0_0(%rip), %xmm1 # xmm1 = mem[0],zero,zero,zero
; CHECK64_SMALL-NEXT: addss %xmm0, %xmm1
; CHECK64_SMALL-NEXT: movd %xmm1, %eax
; CHECK64_SMALL-NEXT: movl %eax, (%rdi)
; CHECK64_SMALL-NEXT: retq
;
; CHECK64_LARGE-LABEL: test_float:
; CHECK64_LARGE: # %bb.0: # %entry
; CHECK64_LARGE-NEXT: movabsq $.LCPI0_0, %rax
; CHECK64_LARGE-NEXT: addss (%rax), %xmm0
; CHECK64_LARGE-NEXT: movd %xmm0, %eax
; CHECK64_LARGE-NEXT: movl %eax, (%rdi)
; CHECK64_LARGE-NEXT: retq
;
; CHECK32-LABEL: test_float:
; CHECK32: # %bb.0: # %entry
; CHECK32-NEXT: movl 4(%esp), %eax
; CHECK32-NEXT: movl 8(%esp), %ecx
; CHECK32-NEXT: movss .LCPI0_0, %xmm0 # xmm0 = mem[0],zero,zero,zero
; CHECK32-NEXT: movd %ecx, %xmm1
; CHECK32-NEXT: addss %xmm0, %xmm1
; CHECK32-NEXT: movd %xmm1, %ecx
; CHECK32-NEXT: movl %ecx, (%eax)
; CHECK32-NEXT: retl
entry:
%aa = fadd float 5.500000e+00, %b
store float %aa, float* %a
ret void
}