41 lines
1.3 KiB
LLVM
41 lines
1.3 KiB
LLVM
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; RUN: llc < %s | FileCheck %s --check-prefix NOATOMIC
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; RUN: llc < %s -asm-verbose=false -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+atomics | FileCheck %s
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target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
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target triple = "wasm32-unknown-unknown"
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; A multithread fence is lowered to an atomic.fence instruction.
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; CHECK-LABEL: multithread_fence:
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; CHECK: atomic.fence
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; NOATOMIC-NOT: i32.atomic.rmw.or
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define void @multithread_fence() {
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fence seq_cst
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ret void
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}
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; Fences with weaker memory orderings than seq_cst should be treated the same
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; because atomic memory access in wasm are sequentially consistent.
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; CHECK-LABEL: multithread_weak_fence:
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; CHECK: atomic.fence
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; CHECK-NEXT: atomic.fence
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; CHECK-NEXT: atomic.fence
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define void @multithread_weak_fence() {
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fence acquire
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fence release
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fence acq_rel
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ret void
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}
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; A singlethread fence becomes compiler_fence instruction, a pseudo instruction
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; that acts as a compiler barrier. The barrier should not be emitted to .s file.
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; CHECK-LABEL: singlethread_fence:
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; CHECK-NOT: compiler_fence
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; CHECK-NOT: atomic_fence
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define void @singlethread_fence() {
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fence syncscope("singlethread") seq_cst
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fence syncscope("singlethread") acquire
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fence syncscope("singlethread") release
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fence syncscope("singlethread") acq_rel
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ret void
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}
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