213 lines
7.9 KiB
LLVM
213 lines
7.9 KiB
LLVM
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; RUN: llc < %s -mtriple=ve -mattr=+vpu | FileCheck %s
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;;; Test vector and intrinsic instructions
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;;;
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;;; Note:
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;;; We test VAND*vvl, VAND*vvl_v, VAND*rvl, VAND*rvl_v, VAND*vvml_v,
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;;; VAND*rvml_v, PVAND*vvl, PVAND*vvl_v, PVAND*rvl, PVAND*rvl_v, PVAND*vvml_v,
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;;; and PVAND*rvml_v instructions.
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; Function Attrs: nounwind readnone
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define fastcc <256 x double> @vand_vvvl(<256 x double> %0, <256 x double> %1) {
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; CHECK-LABEL: vand_vvvl:
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; CHECK: # %bb.0:
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; CHECK-NEXT: lea %s0, 256
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; CHECK-NEXT: lvl %s0
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; CHECK-NEXT: vand %v0, %v0, %v1
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; CHECK-NEXT: b.l.t (, %s10)
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%3 = tail call fast <256 x double> @llvm.ve.vl.vand.vvvl(<256 x double> %0, <256 x double> %1, i32 256)
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ret <256 x double> %3
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}
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; Function Attrs: nounwind readnone
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declare <256 x double> @llvm.ve.vl.vand.vvvl(<256 x double>, <256 x double>, i32)
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; Function Attrs: nounwind readnone
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define fastcc <256 x double> @vand_vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2) {
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; CHECK-LABEL: vand_vvvvl:
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; CHECK: # %bb.0:
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; CHECK-NEXT: lea %s0, 128
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; CHECK-NEXT: lvl %s0
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; CHECK-NEXT: vand %v2, %v0, %v1
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; CHECK-NEXT: lea %s16, 256
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; CHECK-NEXT: lvl %s16
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; CHECK-NEXT: vor %v0, (0)1, %v2
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; CHECK-NEXT: b.l.t (, %s10)
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%4 = tail call fast <256 x double> @llvm.ve.vl.vand.vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2, i32 128)
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ret <256 x double> %4
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}
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; Function Attrs: nounwind readnone
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declare <256 x double> @llvm.ve.vl.vand.vvvvl(<256 x double>, <256 x double>, <256 x double>, i32)
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; Function Attrs: nounwind readnone
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define fastcc <256 x double> @vand_vsvl(i64 %0, <256 x double> %1) {
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; CHECK-LABEL: vand_vsvl:
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; CHECK: # %bb.0:
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; CHECK-NEXT: lea %s1, 256
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; CHECK-NEXT: lvl %s1
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; CHECK-NEXT: vand %v0, %s0, %v0
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; CHECK-NEXT: b.l.t (, %s10)
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%3 = tail call fast <256 x double> @llvm.ve.vl.vand.vsvl(i64 %0, <256 x double> %1, i32 256)
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ret <256 x double> %3
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}
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; Function Attrs: nounwind readnone
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declare <256 x double> @llvm.ve.vl.vand.vsvl(i64, <256 x double>, i32)
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; Function Attrs: nounwind readnone
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define fastcc <256 x double> @vand_vsvvl(i64 %0, <256 x double> %1, <256 x double> %2) {
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; CHECK-LABEL: vand_vsvvl:
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; CHECK: # %bb.0:
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; CHECK-NEXT: lea %s1, 128
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; CHECK-NEXT: lvl %s1
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; CHECK-NEXT: vand %v1, %s0, %v0
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; CHECK-NEXT: lea %s16, 256
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; CHECK-NEXT: lvl %s16
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; CHECK-NEXT: vor %v0, (0)1, %v1
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; CHECK-NEXT: b.l.t (, %s10)
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%4 = tail call fast <256 x double> @llvm.ve.vl.vand.vsvvl(i64 %0, <256 x double> %1, <256 x double> %2, i32 128)
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ret <256 x double> %4
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}
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; Function Attrs: nounwind readnone
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declare <256 x double> @llvm.ve.vl.vand.vsvvl(i64, <256 x double>, <256 x double>, i32)
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; Function Attrs: nounwind readnone
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define fastcc <256 x double> @vand_vvvmvl(<256 x double> %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3) {
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; CHECK-LABEL: vand_vvvmvl:
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; CHECK: # %bb.0:
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; CHECK-NEXT: lea %s0, 128
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; CHECK-NEXT: lvl %s0
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; CHECK-NEXT: vand %v2, %v0, %v1, %vm1
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; CHECK-NEXT: lea %s16, 256
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; CHECK-NEXT: lvl %s16
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; CHECK-NEXT: vor %v0, (0)1, %v2
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; CHECK-NEXT: b.l.t (, %s10)
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%5 = tail call fast <256 x double> @llvm.ve.vl.vand.vvvmvl(<256 x double> %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3, i32 128)
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ret <256 x double> %5
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}
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; Function Attrs: nounwind readnone
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declare <256 x double> @llvm.ve.vl.vand.vvvmvl(<256 x double>, <256 x double>, <256 x i1>, <256 x double>, i32)
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; Function Attrs: nounwind readnone
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define fastcc <256 x double> @vand_vsvmvl(i64 %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3) {
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; CHECK-LABEL: vand_vsvmvl:
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; CHECK: # %bb.0:
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; CHECK-NEXT: lea %s1, 128
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; CHECK-NEXT: lvl %s1
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; CHECK-NEXT: vand %v1, %s0, %v0, %vm1
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; CHECK-NEXT: lea %s16, 256
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; CHECK-NEXT: lvl %s16
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; CHECK-NEXT: vor %v0, (0)1, %v1
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; CHECK-NEXT: b.l.t (, %s10)
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%5 = tail call fast <256 x double> @llvm.ve.vl.vand.vsvmvl(i64 %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3, i32 128)
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ret <256 x double> %5
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}
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; Function Attrs: nounwind readnone
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declare <256 x double> @llvm.ve.vl.vand.vsvmvl(i64, <256 x double>, <256 x i1>, <256 x double>, i32)
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; Function Attrs: nounwind readnone
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define fastcc <256 x double> @pvand_vvvl(<256 x double> %0, <256 x double> %1) {
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; CHECK-LABEL: pvand_vvvl:
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; CHECK: # %bb.0:
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; CHECK-NEXT: lea %s0, 256
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; CHECK-NEXT: lvl %s0
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; CHECK-NEXT: pvand %v0, %v0, %v1
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; CHECK-NEXT: b.l.t (, %s10)
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%3 = tail call fast <256 x double> @llvm.ve.vl.pvand.vvvl(<256 x double> %0, <256 x double> %1, i32 256)
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ret <256 x double> %3
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}
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; Function Attrs: nounwind readnone
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declare <256 x double> @llvm.ve.vl.pvand.vvvl(<256 x double>, <256 x double>, i32)
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; Function Attrs: nounwind readnone
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define fastcc <256 x double> @pvand_vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2) {
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; CHECK-LABEL: pvand_vvvvl:
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; CHECK: # %bb.0:
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; CHECK-NEXT: lea %s0, 128
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; CHECK-NEXT: lvl %s0
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; CHECK-NEXT: pvand %v2, %v0, %v1
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; CHECK-NEXT: lea %s16, 256
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; CHECK-NEXT: lvl %s16
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; CHECK-NEXT: vor %v0, (0)1, %v2
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; CHECK-NEXT: b.l.t (, %s10)
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%4 = tail call fast <256 x double> @llvm.ve.vl.pvand.vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2, i32 128)
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ret <256 x double> %4
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}
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; Function Attrs: nounwind readnone
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declare <256 x double> @llvm.ve.vl.pvand.vvvvl(<256 x double>, <256 x double>, <256 x double>, i32)
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; Function Attrs: nounwind readnone
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define fastcc <256 x double> @pvand_vsvl(i64 %0, <256 x double> %1) {
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; CHECK-LABEL: pvand_vsvl:
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; CHECK: # %bb.0:
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; CHECK-NEXT: lea %s1, 256
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; CHECK-NEXT: lvl %s1
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; CHECK-NEXT: pvand %v0, %s0, %v0
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; CHECK-NEXT: b.l.t (, %s10)
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%3 = tail call fast <256 x double> @llvm.ve.vl.pvand.vsvl(i64 %0, <256 x double> %1, i32 256)
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ret <256 x double> %3
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}
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; Function Attrs: nounwind readnone
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declare <256 x double> @llvm.ve.vl.pvand.vsvl(i64, <256 x double>, i32)
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; Function Attrs: nounwind readnone
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define fastcc <256 x double> @pvand_vsvvl(i64 %0, <256 x double> %1, <256 x double> %2) {
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; CHECK-LABEL: pvand_vsvvl:
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; CHECK: # %bb.0:
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; CHECK-NEXT: lea %s1, 128
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; CHECK-NEXT: lvl %s1
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; CHECK-NEXT: pvand %v1, %s0, %v0
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; CHECK-NEXT: lea %s16, 256
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; CHECK-NEXT: lvl %s16
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; CHECK-NEXT: vor %v0, (0)1, %v1
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; CHECK-NEXT: b.l.t (, %s10)
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%4 = tail call fast <256 x double> @llvm.ve.vl.pvand.vsvvl(i64 %0, <256 x double> %1, <256 x double> %2, i32 128)
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ret <256 x double> %4
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}
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; Function Attrs: nounwind readnone
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declare <256 x double> @llvm.ve.vl.pvand.vsvvl(i64, <256 x double>, <256 x double>, i32)
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; Function Attrs: nounwind readnone
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define fastcc <256 x double> @pvand_vvvMvl(<256 x double> %0, <256 x double> %1, <512 x i1> %2, <256 x double> %3) {
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; CHECK-LABEL: pvand_vvvMvl:
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; CHECK: # %bb.0:
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; CHECK-NEXT: lea %s0, 128
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; CHECK-NEXT: lvl %s0
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; CHECK-NEXT: pvand %v2, %v0, %v1, %vm2
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; CHECK-NEXT: lea %s16, 256
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; CHECK-NEXT: lvl %s16
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; CHECK-NEXT: vor %v0, (0)1, %v2
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; CHECK-NEXT: b.l.t (, %s10)
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%5 = tail call fast <256 x double> @llvm.ve.vl.pvand.vvvMvl(<256 x double> %0, <256 x double> %1, <512 x i1> %2, <256 x double> %3, i32 128)
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ret <256 x double> %5
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}
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; Function Attrs: nounwind readnone
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declare <256 x double> @llvm.ve.vl.pvand.vvvMvl(<256 x double>, <256 x double>, <512 x i1>, <256 x double>, i32)
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; Function Attrs: nounwind readnone
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define fastcc <256 x double> @pvand_vsvMvl(i64 %0, <256 x double> %1, <512 x i1> %2, <256 x double> %3) {
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; CHECK-LABEL: pvand_vsvMvl:
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; CHECK: # %bb.0:
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; CHECK-NEXT: lea %s1, 128
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; CHECK-NEXT: lvl %s1
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; CHECK-NEXT: pvand %v1, %s0, %v0, %vm2
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; CHECK-NEXT: lea %s16, 256
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; CHECK-NEXT: lvl %s16
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; CHECK-NEXT: vor %v0, (0)1, %v1
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; CHECK-NEXT: b.l.t (, %s10)
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%5 = tail call fast <256 x double> @llvm.ve.vl.pvand.vsvMvl(i64 %0, <256 x double> %1, <512 x i1> %2, <256 x double> %3, i32 128)
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ret <256 x double> %5
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}
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; Function Attrs: nounwind readnone
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declare <256 x double> @llvm.ve.vl.pvand.vsvMvl(i64, <256 x double>, <512 x i1>, <256 x double>, i32)
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