84 lines
2.7 KiB
LLVM
84 lines
2.7 KiB
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve -verify-machineinstrs %s -o - | FileCheck %s
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; RUN: llc -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve.fp -verify-machineinstrs %s -o - | FileCheck %s
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define arm_aapcs_vfpcc <8 x i16> @mov_int16_511() {
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; CHECK-LABEL: mov_int16_511:
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; CHECK: @ %bb.0: @ %entry
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; CHECK-NEXT: vmvn.i16 q0, #0xfe00
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; CHECK-NEXT: bx lr
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entry:
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ret <8 x i16> <i16 511, i16 511, i16 511, i16 511, i16 511, i16 511, i16 511, i16 511>
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}
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define arm_aapcs_vfpcc <8 x i16> @mov_int16_65281() {
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; CHECK-LABEL: mov_int16_65281:
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; CHECK: @ %bb.0: @ %entry
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; CHECK-NEXT: vmvn.i16 q0, #0xfe
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; CHECK-NEXT: bx lr
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entry:
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ret <8 x i16> <i16 65281, i16 65281, i16 65281, i16 65281, i16 65281, i16 65281, i16 65281, i16 65281>
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}
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define arm_aapcs_vfpcc <4 x i32> @mov_int32_m7() {
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; CHECK-LABEL: mov_int32_m7:
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; CHECK: @ %bb.0: @ %entry
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; CHECK-NEXT: vmvn.i32 q0, #0x6
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; CHECK-NEXT: bx lr
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entry:
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ret <4 x i32> <i32 -7, i32 -7, i32 -7, i32 -7>
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}
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define arm_aapcs_vfpcc <4 x i32> @mov_int32_m769() {
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; CHECK-LABEL: mov_int32_m769:
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; CHECK: @ %bb.0: @ %entry
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; CHECK-NEXT: vmvn.i32 q0, #0x300
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; CHECK-NEXT: bx lr
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entry:
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ret <4 x i32> <i32 -769, i32 -769, i32 -769, i32 -769>
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}
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define arm_aapcs_vfpcc <4 x i32> @mov_int32_m262145() {
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; CHECK-LABEL: mov_int32_m262145:
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; CHECK: @ %bb.0: @ %entry
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; CHECK-NEXT: vmvn.i32 q0, #0x40000
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; CHECK-NEXT: bx lr
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entry:
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ret <4 x i32> <i32 -262145, i32 -262145, i32 -262145, i32 -262145>
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}
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define arm_aapcs_vfpcc <4 x i32> @mov_int32_m134217729() {
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; CHECK-LABEL: mov_int32_m134217729:
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; CHECK: @ %bb.0: @ %entry
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; CHECK-NEXT: vmvn.i32 q0, #0x8000000
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; CHECK-NEXT: bx lr
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entry:
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ret <4 x i32> <i32 -134217729, i32 -134217729, i32 -134217729, i32 -134217729>
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}
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define arm_aapcs_vfpcc <4 x i32> @mov_int32_4294902528() {
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; CHECK-LABEL: mov_int32_4294902528:
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; CHECK: @ %bb.0: @ %entry
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; CHECK-NEXT: vmvn.i32 q0, #0xfcff
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; CHECK-NEXT: bx lr
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entry:
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ret <4 x i32> <i32 4294902528, i32 4294902528, i32 4294902528, i32 4294902528>
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}
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define arm_aapcs_vfpcc <4 x i32> @mov_int32_4278386688() {
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; CHECK-LABEL: mov_int32_4278386688:
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; CHECK: @ %bb.0: @ %entry
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; CHECK-NEXT: adr r0, .LCPI7_0
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; CHECK-NEXT: vldrw.u32 q0, [r0]
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; CHECK-NEXT: bx lr
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; CHECK-NEXT: .p2align 4
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; CHECK-NEXT: @ %bb.1:
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; CHECK-NEXT: .LCPI7_0:
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; CHECK-NEXT: .long 4278386688 @ double -6.5147775434702224E+303
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; CHECK-NEXT: .long 4278386688
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; CHECK-NEXT: .long 4278386688 @ double -6.5147775434702224E+303
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; CHECK-NEXT: .long 4278386688
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entry:
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ret <4 x i32> <i32 4278386688, i32 4278386688, i32 4278386688, i32 4278386688>
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}
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