36 lines
983 B
LLVM
36 lines
983 B
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; Test use of RISBG vs RISBGN on zEC12.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=zEC12 | FileCheck %s
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; On zEC12, we generally prefer RISBGN.
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define i64 @f1(i64 %a, i64 %b) {
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; CHECK-LABEL: f1:
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; CHECK: # %bb.0:
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; CHECK-NEXT: risbgn %r2, %r3, 60, 62, 0
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; CHECK-NEXT: br %r14
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%anda = and i64 %a, -15
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%andb = and i64 %b, 14
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%or = or i64 %anda, %andb
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ret i64 %or
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}
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; But we may fall back to RISBG if we can use the condition code.
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define i64 @f2(i64 %a, i64 %b, i32* %c) {
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; CHECK-LABEL: f2:
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; CHECK: # %bb.0:
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; CHECK-NEXT: risbg %r2, %r3, 60, 62, 0
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; CHECK-NEXT: ipm %r0
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; CHECK-NEXT: risblg %r0, %r0, 31, 159, 35
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; CHECK-NEXT: st %r0, 0(%r4)
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; CHECK-NEXT: br %r14
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%anda = and i64 %a, -15
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%andb = and i64 %b, 14
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%or = or i64 %anda, %andb
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%cmp = icmp sgt i64 %or, 0
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%conv = zext i1 %cmp to i32
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store i32 %conv, i32* %c, align 4
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ret i64 %or
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}
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