104 lines
2.9 KiB
LLVM
104 lines
2.9 KiB
LLVM
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; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s --check-prefix=SM20
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; RUN: llc < %s -march=nvptx -mcpu=sm_30 | FileCheck %s --check-prefix=SM30
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target triple = "nvptx-unknown-cuda"
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@tex0 = internal addrspace(1) global i64 0, align 8
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@surf0 = internal addrspace(1) global i64 0, align 8
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declare i32 @llvm.nvvm.txq.width(i64)
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declare i32 @llvm.nvvm.txq.height(i64)
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declare i32 @llvm.nvvm.suq.width(i64)
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declare i32 @llvm.nvvm.suq.height(i64)
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declare i64 @llvm.nvvm.texsurf.handle.internal.p1i64(i64 addrspace(1)*)
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; SM20-LABEL: @t0
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; SM30-LABEL: @t0
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define i32 @t0(i64 %texHandle) {
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; SM20: txq.width.b32
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; SM30: txq.width.b32
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%width = tail call i32 @llvm.nvvm.txq.width(i64 %texHandle)
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ret i32 %width
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}
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; SM20-LABEL: @t1
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; SM30-LABEL: @t1
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define i32 @t1() {
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; SM30: mov.u64 %rd[[HANDLE:[0-9]+]], tex0
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%texHandle = tail call i64 @llvm.nvvm.texsurf.handle.internal.p1i64(i64 addrspace(1)* @tex0)
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; SM20: txq.width.b32 %r{{[0-9]+}}, [tex0]
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; SM30: txq.width.b32 %r{{[0-9]+}}, [%rd[[HANDLE:[0-9]+]]]
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%width = tail call i32 @llvm.nvvm.txq.width(i64 %texHandle)
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ret i32 %width
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}
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; SM20-LABEL: @t2
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; SM30-LABEL: @t2
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define i32 @t2(i64 %texHandle) {
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; SM20: txq.height.b32
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; SM30: txq.height.b32
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%height = tail call i32 @llvm.nvvm.txq.height(i64 %texHandle)
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ret i32 %height
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}
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; SM20-LABEL: @t3
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; SM30-LABEL: @t3
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define i32 @t3() {
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; SM30: mov.u64 %rd[[HANDLE:[0-9]+]], tex0
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%texHandle = tail call i64 @llvm.nvvm.texsurf.handle.internal.p1i64(i64 addrspace(1)* @tex0)
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; SM20: txq.height.b32 %r{{[0-9]+}}, [tex0]
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; SM30: txq.height.b32 %r{{[0-9]+}}, [%rd[[HANDLE:[0-9]+]]]
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%height = tail call i32 @llvm.nvvm.txq.height(i64 %texHandle)
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ret i32 %height
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}
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; SM20-LABEL: @s0
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; SM30-LABEL: @s0
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define i32 @s0(i64 %surfHandle) {
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; SM20: suq.width.b32
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; SM30: suq.width.b32
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%width = tail call i32 @llvm.nvvm.suq.width(i64 %surfHandle)
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ret i32 %width
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}
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; SM20-LABEL: @s1
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; SM30-LABEL: @s1
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define i32 @s1() {
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; SM30: mov.u64 %rd[[HANDLE:[0-9]+]], surf0
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%surfHandle = tail call i64 @llvm.nvvm.texsurf.handle.internal.p1i64(i64 addrspace(1)* @surf0)
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; SM20: suq.width.b32 %r{{[0-9]+}}, [surf0]
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; SM30: suq.width.b32 %r{{[0-9]+}}, [%rd[[HANDLE:[0-9]+]]]
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%width = tail call i32 @llvm.nvvm.suq.width(i64 %surfHandle)
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ret i32 %width
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}
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; SM20-LABEL: @s2
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; SM30-LABEL: @s2
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define i32 @s2(i64 %surfHandle) {
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; SM20: suq.height.b32
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; SM30: suq.height.b32
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%height = tail call i32 @llvm.nvvm.suq.height(i64 %surfHandle)
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ret i32 %height
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}
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; SM20-LABEL: @s3
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; SM30-LABEL: @s3
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define i32 @s3() {
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; SM30: mov.u64 %rd[[HANDLE:[0-9]+]], surf0
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%surfHandle = tail call i64 @llvm.nvvm.texsurf.handle.internal.p1i64(i64 addrspace(1)* @surf0)
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; SM20: suq.height.b32 %r{{[0-9]+}}, [surf0]
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; SM30: suq.height.b32 %r{{[0-9]+}}, [%rd[[HANDLE:[0-9]+]]]
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%height = tail call i32 @llvm.nvvm.suq.height(i64 %surfHandle)
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ret i32 %height
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}
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!nvvm.annotations = !{!1, !2}
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!1 = !{i64 addrspace(1)* @tex0, !"texture", i32 1}
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!2 = !{i64 addrspace(1)* @surf0, !"surface", i32 1}
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