113 lines
3.2 KiB
LLVM
113 lines
3.2 KiB
LLVM
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; RUN: llc -O2 < %s -march=nvptx -mcpu=sm_35 | FileCheck %s --check-prefix=O2 --check-prefix=CHECK
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; RUN: llc -O0 < %s -march=nvptx -mcpu=sm_35 | FileCheck %s --check-prefix=O0 --check-prefix=CHECK
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; The following IR
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;
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; quot = n / d
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; rem = n % d
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;
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; should be transformed into
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;
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; quot = n / d
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; rem = n - (n / d) * d
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;
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; during NVPTX isel, at -O2. At -O0, we should leave it alone.
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; CHECK-LABEL: sdiv32(
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define void @sdiv32(i32 %n, i32 %d, i32* %quot_ret, i32* %rem_ret) {
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; CHECK: div.s32 [[quot:%r[0-9]+]], [[num:%r[0-9]+]], [[den:%r[0-9]+]];
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%quot = sdiv i32 %n, %d
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; O0: rem.s32
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; (This is unfortunately order-sensitive, even though mul is commutative.)
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; O2: mul.lo.s32 [[mul:%r[0-9]+]], [[quot]], [[den]];
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; O2: sub.s32 [[rem:%r[0-9]+]], [[num]], [[mul]]
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%rem = srem i32 %n, %d
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; O2: st{{.*}}[[quot]]
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store i32 %quot, i32* %quot_ret
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; O2: st{{.*}}[[rem]]
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store i32 %rem, i32* %rem_ret
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ret void
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}
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; CHECK-LABEL: udiv32(
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define void @udiv32(i32 %n, i32 %d, i32* %quot_ret, i32* %rem_ret) {
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; CHECK: div.u32 [[quot:%r[0-9]+]], [[num:%r[0-9]+]], [[den:%r[0-9]+]];
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%quot = udiv i32 %n, %d
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; O0: rem.u32
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; Selection DAG doesn't know whether this is signed or unsigned
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; multiplication and subtraction, but it doesn't make a difference either
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; way.
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; O2: mul.lo.{{u|s}}32 [[mul:%r[0-9]+]], [[quot]], [[den]];
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; O2: sub.{{u|s}}32 [[rem:%r[0-9]+]], [[num]], [[mul]]
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%rem = urem i32 %n, %d
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; O2: st{{.*}}[[quot]]
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store i32 %quot, i32* %quot_ret
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; O2: st{{.*}}[[rem]]
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store i32 %rem, i32* %rem_ret
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ret void
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}
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; Check that we don't perform this optimization if one operation is signed and
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; the other isn't.
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; CHECK-LABEL: mismatched_types1(
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define void @mismatched_types1(i32 %n, i32 %d, i32* %quot_ret, i32* %rem_ret) {
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; CHECK: div.u32
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; CHECK: rem.s32
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%quot = udiv i32 %n, %d
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%rem = srem i32 %n, %d
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store i32 %quot, i32* %quot_ret
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store i32 %rem, i32* %rem_ret
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ret void
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}
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; CHECK-LABEL: mismatched_types2(
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define void @mismatched_types2(i32 %n, i32 %d, i32* %quot_ret, i32* %rem_ret) {
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; CHECK: div.s32
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; CHECK: rem.u32
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%quot = sdiv i32 %n, %d
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%rem = urem i32 %n, %d
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store i32 %quot, i32* %quot_ret
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store i32 %rem, i32* %rem_ret
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ret void
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}
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; Check that we don't perform this optimization if the inputs to the div don't
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; match the inputs to the rem.
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; CHECK-LABEL: mismatched_inputs1(
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define void @mismatched_inputs1(i32 %n, i32 %d, i32* %quot_ret, i32* %rem_ret) {
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; CHECK: div.s32
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; CHECK: rem.s32
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%quot = sdiv i32 %n, %d
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%rem = srem i32 %d, %n
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store i32 %quot, i32* %quot_ret
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store i32 %rem, i32* %rem_ret
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ret void
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}
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; CHECK-LABEL: mismatched_inputs2(
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define void @mismatched_inputs2(i32 %n1, i32 %n2, i32 %d, i32* %quot_ret, i32* %rem_ret) {
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; CHECK: div.s32
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; CHECK: rem.s32
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%quot = sdiv i32 %n1, %d
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%rem = srem i32 %n2, %d
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store i32 %quot, i32* %quot_ret
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store i32 %rem, i32* %rem_ret
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ret void
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}
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; CHECK-LABEL: mismatched_inputs3(
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define void @mismatched_inputs3(i32 %n, i32 %d1, i32 %d2, i32* %quot_ret, i32* %rem_ret) {
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; CHECK: div.s32
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; CHECK: rem.s32
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%quot = sdiv i32 %n, %d1
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%rem = srem i32 %n, %d2
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store i32 %quot, i32* %quot_ret
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store i32 %rem, i32* %rem_ret
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ret void
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}
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