llvm-for-llvmta/test/CodeGen/Mips/GlobalISel/regbankselect/pointers.mir

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2022-04-25 10:02:23 +02:00
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=regbankselect -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32
--- |
define void @ptr_arg_in_regs(i32* %p) {entry: ret void}
define void @ptr_arg_on_stack(i32 %x1, i32 %x2, i32 %x3, i32 %x4, i32* %p) {entry: ret void}
define void @ret_ptr(i8* %p) {entry: ret void}
...
---
name: ptr_arg_in_regs
alignment: 4
legalized: true
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $a0
; MIPS32-LABEL: name: ptr_arg_in_regs
; MIPS32: liveins: $a0
; MIPS32: [[COPY:%[0-9]+]]:gprb(p0) = COPY $a0
; MIPS32: [[LOAD:%[0-9]+]]:gprb(s32) = G_LOAD [[COPY]](p0) :: (load 4 from %ir.p)
; MIPS32: $v0 = COPY [[LOAD]](s32)
; MIPS32: RetRA implicit $v0
%0:_(p0) = COPY $a0
%1:_(s32) = G_LOAD %0(p0) :: (load 4 from %ir.p)
$v0 = COPY %1(s32)
RetRA implicit $v0
...
---
name: ptr_arg_on_stack
alignment: 4
legalized: true
tracksRegLiveness: true
fixedStack:
- { id: 0, offset: 16, size: 4, alignment: 8, stack-id: default, isImmutable: true }
body: |
bb.1.entry:
liveins: $a0, $a1, $a2, $a3
; MIPS32-LABEL: name: ptr_arg_on_stack
; MIPS32: liveins: $a0, $a1, $a2, $a3
; MIPS32: [[COPY:%[0-9]+]]:gprb(s32) = COPY $a0
; MIPS32: [[COPY1:%[0-9]+]]:gprb(s32) = COPY $a1
; MIPS32: [[COPY2:%[0-9]+]]:gprb(s32) = COPY $a2
; MIPS32: [[COPY3:%[0-9]+]]:gprb(s32) = COPY $a3
; MIPS32: [[FRAME_INDEX:%[0-9]+]]:gprb(p0) = G_FRAME_INDEX %fixed-stack.0
; MIPS32: [[LOAD:%[0-9]+]]:gprb(p0) = G_LOAD [[FRAME_INDEX]](p0) :: (load 4 from %fixed-stack.0, align 8)
; MIPS32: [[LOAD1:%[0-9]+]]:gprb(s32) = G_LOAD [[LOAD]](p0) :: (load 4 from %ir.p)
; MIPS32: $v0 = COPY [[LOAD1]](s32)
; MIPS32: RetRA implicit $v0
%0:_(s32) = COPY $a0
%1:_(s32) = COPY $a1
%2:_(s32) = COPY $a2
%3:_(s32) = COPY $a3
%5:_(p0) = G_FRAME_INDEX %fixed-stack.0
%4:_(p0) = G_LOAD %5(p0) :: (load 4 from %fixed-stack.0, align 8)
%6:_(s32) = G_LOAD %4(p0) :: (load 4 from %ir.p)
$v0 = COPY %6(s32)
RetRA implicit $v0
...
---
name: ret_ptr
alignment: 4
legalized: true
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $a0
; MIPS32-LABEL: name: ret_ptr
; MIPS32: liveins: $a0
; MIPS32: [[COPY:%[0-9]+]]:gprb(p0) = COPY $a0
; MIPS32: $v0 = COPY [[COPY]](p0)
; MIPS32: RetRA implicit $v0
%0:_(p0) = COPY $a0
$v0 = COPY %0(p0)
RetRA implicit $v0
...