187 lines
4.8 KiB
LLVM
187 lines
4.8 KiB
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -O0 -mtriple=mipsel-linux-gnu -global-isel -verify-machineinstrs %s -o -| FileCheck %s -check-prefixes=MIPS32
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define i32 @add_i32(i32 %x, i32 %y) {
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; MIPS32-LABEL: add_i32:
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; MIPS32: # %bb.0: # %entry
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; MIPS32-NEXT: addu $2, $4, $5
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; MIPS32-NEXT: jr $ra
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; MIPS32-NEXT: nop
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entry:
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%z = add i32 %x, %y
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ret i32 %z
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}
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define signext i8 @add_i8_sext(i8 signext %a, i8 signext %b) {
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; MIPS32-LABEL: add_i8_sext:
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; MIPS32: # %bb.0: # %entry
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; MIPS32-NEXT: addu $1, $5, $4
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; MIPS32-NEXT: sll $1, $1, 24
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; MIPS32-NEXT: sra $2, $1, 24
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; MIPS32-NEXT: jr $ra
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; MIPS32-NEXT: nop
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entry:
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%add = add i8 %b, %a
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ret i8 %add
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}
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define zeroext i8 @add_i8_zext(i8 zeroext %a, i8 zeroext %b) {
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; MIPS32-LABEL: add_i8_zext:
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; MIPS32: # %bb.0: # %entry
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; MIPS32-NEXT: addu $1, $5, $4
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; MIPS32-NEXT: andi $2, $1, 255
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; MIPS32-NEXT: jr $ra
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; MIPS32-NEXT: nop
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entry:
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%add = add i8 %b, %a
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ret i8 %add
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}
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define i8 @add_i8_aext(i8 %a, i8 %b) {
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; MIPS32-LABEL: add_i8_aext:
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; MIPS32: # %bb.0: # %entry
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; MIPS32-NEXT: addu $2, $5, $4
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; MIPS32-NEXT: jr $ra
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; MIPS32-NEXT: nop
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entry:
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%add = add i8 %b, %a
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ret i8 %add
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}
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define signext i16 @add_i16_sext(i16 signext %a, i16 signext %b) {
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; MIPS32-LABEL: add_i16_sext:
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; MIPS32: # %bb.0: # %entry
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; MIPS32-NEXT: addu $1, $5, $4
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; MIPS32-NEXT: sll $1, $1, 16
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; MIPS32-NEXT: sra $2, $1, 16
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; MIPS32-NEXT: jr $ra
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; MIPS32-NEXT: nop
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entry:
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%add = add i16 %b, %a
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ret i16 %add
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}
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define zeroext i16 @add_i16_zext(i16 zeroext %a, i16 zeroext %b) {
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; MIPS32-LABEL: add_i16_zext:
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; MIPS32: # %bb.0: # %entry
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; MIPS32-NEXT: addu $1, $5, $4
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; MIPS32-NEXT: andi $2, $1, 65535
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; MIPS32-NEXT: jr $ra
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; MIPS32-NEXT: nop
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entry:
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%add = add i16 %b, %a
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ret i16 %add
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}
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define i16 @add_i16_aext(i16 %a, i16 %b) {
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; MIPS32-LABEL: add_i16_aext:
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; MIPS32: # %bb.0: # %entry
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; MIPS32-NEXT: addu $2, $5, $4
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; MIPS32-NEXT: jr $ra
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; MIPS32-NEXT: nop
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entry:
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%add = add i16 %b, %a
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ret i16 %add
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}
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define i64 @add_i64(i64 %a, i64 %b) {
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; MIPS32-LABEL: add_i64:
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; MIPS32: # %bb.0: # %entry
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; MIPS32-NEXT: addu $2, $6, $4
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; MIPS32-NEXT: sltu $3, $2, $4
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; MIPS32-NEXT: addu $1, $7, $5
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; MIPS32-NEXT: andi $3, $3, 1
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; MIPS32-NEXT: addu $3, $1, $3
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; MIPS32-NEXT: jr $ra
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; MIPS32-NEXT: nop
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entry:
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%add = add i64 %b, %a
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ret i64 %add
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}
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define i128 @add_i128(i128 %a, i128 %b) {
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; MIPS32-LABEL: add_i128:
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; MIPS32: # %bb.0: # %entry
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; MIPS32-NEXT: move $8, $4
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; MIPS32-NEXT: move $3, $5
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; MIPS32-NEXT: move $4, $6
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; MIPS32-NEXT: addiu $1, $sp, 16
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; MIPS32-NEXT: lw $2, 0($1)
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; MIPS32-NEXT: addiu $1, $sp, 20
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; MIPS32-NEXT: lw $6, 0($1)
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; MIPS32-NEXT: addiu $1, $sp, 24
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; MIPS32-NEXT: lw $5, 0($1)
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; MIPS32-NEXT: addiu $1, $sp, 28
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; MIPS32-NEXT: lw $1, 0($1)
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; MIPS32-NEXT: addu $2, $2, $8
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; MIPS32-NEXT: sltu $8, $2, $8
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; MIPS32-NEXT: addu $3, $6, $3
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; MIPS32-NEXT: andi $8, $8, 1
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; MIPS32-NEXT: addu $3, $3, $8
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; MIPS32-NEXT: sltu $6, $3, $6
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; MIPS32-NEXT: addu $4, $5, $4
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; MIPS32-NEXT: andi $6, $6, 1
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; MIPS32-NEXT: addu $4, $4, $6
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; MIPS32-NEXT: sltu $5, $4, $5
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; MIPS32-NEXT: addu $1, $1, $7
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; MIPS32-NEXT: andi $5, $5, 1
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; MIPS32-NEXT: addu $5, $1, $5
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; MIPS32-NEXT: jr $ra
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; MIPS32-NEXT: nop
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entry:
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%add = add i128 %b, %a
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ret i128 %add
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}
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define i32 @add_imm(i32 %a) {
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; MIPS32-LABEL: add_imm:
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; MIPS32: # %bb.0: # %entry
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; MIPS32-NEXT: addiu $2, $4, 3
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; MIPS32-NEXT: jr $ra
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; MIPS32-NEXT: nop
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entry:
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%add = add i32 %a, 3
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ret i32 %add
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}
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define i32 @add_negative_imm(i32 %a) {
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; MIPS32-LABEL: add_negative_imm:
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; MIPS32: # %bb.0: # %entry
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; MIPS32-NEXT: addiu $2, $4, -3
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; MIPS32-NEXT: jr $ra
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; MIPS32-NEXT: nop
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entry:
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%add = add i32 %a, -3
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ret i32 %add
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}
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define i32 @add_not_imm32SExt16(i32 %a) {
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; MIPS32-LABEL: add_not_imm32SExt16:
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; MIPS32: # %bb.0: # %entry
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; MIPS32-NEXT: ori $1, $zero, 65535
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; MIPS32-NEXT: addu $2, $4, $1
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; MIPS32-NEXT: jr $ra
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; MIPS32-NEXT: nop
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entry:
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%add = add i32 %a, 65535
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ret i32 %add
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}
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declare { i32, i1 } @llvm.uadd.with.overflow.i32(i32, i32)
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define void @uadd_with_overflow(i32 %lhs, i32 %rhs, i32* %padd, i1* %pcarry_flag) {
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; MIPS32-LABEL: uadd_with_overflow:
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; MIPS32: # %bb.0:
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; MIPS32-NEXT: addu $1, $4, $5
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; MIPS32-NEXT: sltu $2, $1, $5
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; MIPS32-NEXT: andi $2, $2, 1
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; MIPS32-NEXT: sb $2, 0($7)
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; MIPS32-NEXT: sw $1, 0($6)
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; MIPS32-NEXT: jr $ra
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; MIPS32-NEXT: nop
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%res = call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 %lhs, i32 %rhs)
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%carry_flag = extractvalue { i32, i1 } %res, 1
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%add = extractvalue { i32, i1 } %res, 0
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store i1 %carry_flag, i1* %pcarry_flag
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store i32 %add, i32* %padd
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ret void
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}
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