61 lines
2.1 KiB
Plaintext
61 lines
2.1 KiB
Plaintext
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=mipsel-linux-gnu -mcpu=mips32r5 -mattr=+msa,+fp64,+nan2008 -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=P5600
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--- |
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declare <4 x float> @llvm.mips.fsqrt.w(<4 x float>)
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define void @fsqrt_v4f32_builtin(<4 x float>* %a, <4 x float>* %c) { entry: ret void }
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declare <2 x double> @llvm.mips.fsqrt.d(<2 x double>)
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define void @fsqrt_v2f64_builtin(<2 x double>* %a, <2 x double>* %c) { entry: ret void }
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...
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---
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name: fsqrt_v4f32_builtin
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alignment: 4
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tracksRegLiveness: true
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body: |
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bb.1.entry:
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liveins: $a0, $a1
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; P5600-LABEL: name: fsqrt_v4f32_builtin
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; P5600: liveins: $a0, $a1
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; P5600: [[COPY:%[0-9]+]]:_(p0) = COPY $a0
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; P5600: [[COPY1:%[0-9]+]]:_(p0) = COPY $a1
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; P5600: [[LOAD:%[0-9]+]]:_(<4 x s32>) = G_LOAD [[COPY]](p0) :: (load 16 from %ir.a)
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; P5600: [[FSQRT:%[0-9]+]]:_(<4 x s32>) = G_FSQRT [[LOAD]]
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; P5600: G_STORE [[FSQRT]](<4 x s32>), [[COPY1]](p0) :: (store 16 into %ir.c)
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; P5600: RetRA
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%0:_(p0) = COPY $a0
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%1:_(p0) = COPY $a1
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%2:_(<4 x s32>) = G_LOAD %0(p0) :: (load 16 from %ir.a)
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%3:_(<4 x s32>) = G_INTRINSIC intrinsic(@llvm.mips.fsqrt.w), %2(<4 x s32>)
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G_STORE %3(<4 x s32>), %1(p0) :: (store 16 into %ir.c)
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RetRA
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...
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---
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name: fsqrt_v2f64_builtin
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alignment: 4
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tracksRegLiveness: true
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body: |
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bb.1.entry:
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liveins: $a0, $a1
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; P5600-LABEL: name: fsqrt_v2f64_builtin
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; P5600: liveins: $a0, $a1
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; P5600: [[COPY:%[0-9]+]]:_(p0) = COPY $a0
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; P5600: [[COPY1:%[0-9]+]]:_(p0) = COPY $a1
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; P5600: [[LOAD:%[0-9]+]]:_(<2 x s64>) = G_LOAD [[COPY]](p0) :: (load 16 from %ir.a)
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; P5600: [[FSQRT:%[0-9]+]]:_(<2 x s64>) = G_FSQRT [[LOAD]]
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; P5600: G_STORE [[FSQRT]](<2 x s64>), [[COPY1]](p0) :: (store 16 into %ir.c)
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; P5600: RetRA
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%0:_(p0) = COPY $a0
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%1:_(p0) = COPY $a1
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%2:_(<2 x s64>) = G_LOAD %0(p0) :: (load 16 from %ir.a)
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%3:_(<2 x s64>) = G_INTRINSIC intrinsic(@llvm.mips.fsqrt.d), %2(<2 x s64>)
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G_STORE %3(<2 x s64>), %1(p0) :: (store 16 into %ir.c)
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RetRA
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...
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