108 lines
3.6 KiB
Plaintext
108 lines
3.6 KiB
Plaintext
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=FP32
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# RUN: llc -O0 -mtriple=mipsel-linux-gnu -mattr=+fp64,+mips32r2 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=FP64
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--- |
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define void @i32tof32() {entry: ret void}
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define void @i32tof64() {entry: ret void}
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define void @u32tof64() {entry: ret void}
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...
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---
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name: i32tof32
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.1.entry:
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liveins: $a0
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; FP32-LABEL: name: i32tof32
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; FP32: liveins: $a0
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; FP32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
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; FP32: [[PseudoCVT_S_W:%[0-9]+]]:fgr32 = PseudoCVT_S_W [[COPY]]
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; FP32: $f0 = COPY [[PseudoCVT_S_W]]
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; FP32: RetRA implicit $f0
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; FP64-LABEL: name: i32tof32
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; FP64: liveins: $a0
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; FP64: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
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; FP64: [[PseudoCVT_S_W:%[0-9]+]]:fgr32 = PseudoCVT_S_W [[COPY]]
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; FP64: $f0 = COPY [[PseudoCVT_S_W]]
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; FP64: RetRA implicit $f0
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%0:gprb(s32) = COPY $a0
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%1:fprb(s32) = G_SITOFP %0(s32)
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$f0 = COPY %1(s32)
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RetRA implicit $f0
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...
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---
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name: i32tof64
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.1.entry:
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liveins: $a0
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; FP32-LABEL: name: i32tof64
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; FP32: liveins: $a0
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; FP32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
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; FP32: [[PseudoCVT_D32_W:%[0-9]+]]:afgr64 = PseudoCVT_D32_W [[COPY]]
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; FP32: $d0 = COPY [[PseudoCVT_D32_W]]
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; FP32: RetRA implicit $d0
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; FP64-LABEL: name: i32tof64
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; FP64: liveins: $a0
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; FP64: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
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; FP64: [[PseudoCVT_D64_W:%[0-9]+]]:fgr64 = PseudoCVT_D64_W [[COPY]]
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; FP64: $d0 = COPY [[PseudoCVT_D64_W]]
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; FP64: RetRA implicit $d0
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%0:gprb(s32) = COPY $a0
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%1:fprb(s64) = G_SITOFP %0(s32)
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$d0 = COPY %1(s64)
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RetRA implicit $d0
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...
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---
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name: u32tof64
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.1.entry:
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liveins: $a0
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; FP32-LABEL: name: u32tof64
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; FP32: liveins: $a0
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; FP32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
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; FP32: [[LUi:%[0-9]+]]:gpr32 = LUi 17200
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; FP32: [[BuildPairF64_:%[0-9]+]]:afgr64 = BuildPairF64 [[COPY]], [[LUi]]
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; FP32: [[LUi1:%[0-9]+]]:gpr32 = LUi 17200
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; FP32: [[ORi:%[0-9]+]]:gpr32 = ORi $zero, 0
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; FP32: [[BuildPairF64_1:%[0-9]+]]:afgr64 = BuildPairF64 [[ORi]], [[LUi1]]
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; FP32: [[FSUB_D32_:%[0-9]+]]:afgr64 = FSUB_D32 [[BuildPairF64_]], [[BuildPairF64_1]]
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; FP32: $d0 = COPY [[FSUB_D32_]]
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; FP32: RetRA implicit $d0
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; FP64-LABEL: name: u32tof64
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; FP64: liveins: $a0
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; FP64: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
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; FP64: [[LUi:%[0-9]+]]:gpr32 = LUi 17200
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; FP64: [[BuildPairF64_64_:%[0-9]+]]:fgr64 = BuildPairF64_64 [[COPY]], [[LUi]]
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; FP64: [[LUi1:%[0-9]+]]:gpr32 = LUi 17200
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; FP64: [[ORi:%[0-9]+]]:gpr32 = ORi $zero, 0
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; FP64: [[BuildPairF64_64_1:%[0-9]+]]:fgr64 = BuildPairF64_64 [[ORi]], [[LUi1]]
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; FP64: [[FSUB_D64_:%[0-9]+]]:fgr64 = FSUB_D64 [[BuildPairF64_64_]], [[BuildPairF64_64_1]]
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; FP64: $d0 = COPY [[FSUB_D64_]]
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; FP64: RetRA implicit $d0
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%0:gprb(s32) = COPY $a0
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%2:gprb(s32) = G_CONSTANT i32 1127219200
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%3:fprb(s64) = G_MERGE_VALUES %0(s32), %2(s32)
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%4:fprb(s64) = G_FCONSTANT double 0x4330000000000000
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%1:fprb(s64) = G_FSUB %3, %4
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$d0 = COPY %1(s64)
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RetRA implicit $d0
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...
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