179 lines
6.7 KiB
Plaintext
179 lines
6.7 KiB
Plaintext
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32FP32
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# RUN: llc -O0 -mtriple=mipsel-linux-gnu -mattr=+fp64,+mips32r2 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32FP64
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--- |
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define void @select_i32() {entry: ret void}
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define void @select_ptr() {entry: ret void}
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define void @select_float() {entry: ret void}
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define void @select_double() {entry: ret void}
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...
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---
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name: select_i32
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.1.entry:
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liveins: $a0, $a1, $a2
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; MIPS32FP32-LABEL: name: select_i32
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; MIPS32FP32: liveins: $a0, $a1, $a2
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; MIPS32FP32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
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; MIPS32FP32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1
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; MIPS32FP32: [[COPY2:%[0-9]+]]:gpr32 = COPY $a2
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; MIPS32FP32: [[ANDi:%[0-9]+]]:gpr32 = ANDi [[COPY]], 1
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; MIPS32FP32: [[MOVN_I_I:%[0-9]+]]:gpr32 = MOVN_I_I [[COPY1]], [[ANDi]], [[COPY2]]
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; MIPS32FP32: $v0 = COPY [[MOVN_I_I]]
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; MIPS32FP32: RetRA implicit $v0
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; MIPS32FP64-LABEL: name: select_i32
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; MIPS32FP64: liveins: $a0, $a1, $a2
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; MIPS32FP64: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
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; MIPS32FP64: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1
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; MIPS32FP64: [[COPY2:%[0-9]+]]:gpr32 = COPY $a2
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; MIPS32FP64: [[ANDi:%[0-9]+]]:gpr32 = ANDi [[COPY]], 1
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; MIPS32FP64: [[MOVN_I_I:%[0-9]+]]:gpr32 = MOVN_I_I [[COPY1]], [[ANDi]], [[COPY2]]
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; MIPS32FP64: $v0 = COPY [[MOVN_I_I]]
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; MIPS32FP64: RetRA implicit $v0
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%3:gprb(s32) = COPY $a0
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%1:gprb(s32) = COPY $a1
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%2:gprb(s32) = COPY $a2
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%6:gprb(s32) = G_CONSTANT i32 1
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%7:gprb(s32) = COPY %3(s32)
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%5:gprb(s32) = G_AND %7, %6
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%4:gprb(s32) = G_SELECT %5(s32), %1, %2
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$v0 = COPY %4(s32)
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RetRA implicit $v0
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...
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---
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name: select_ptr
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.1.entry:
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liveins: $a0, $a1, $a2
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; MIPS32FP32-LABEL: name: select_ptr
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; MIPS32FP32: liveins: $a0, $a1, $a2
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; MIPS32FP32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
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; MIPS32FP32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1
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; MIPS32FP32: [[COPY2:%[0-9]+]]:gpr32 = COPY $a2
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; MIPS32FP32: [[ANDi:%[0-9]+]]:gpr32 = ANDi [[COPY]], 1
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; MIPS32FP32: [[MOVN_I_I:%[0-9]+]]:gpr32 = MOVN_I_I [[COPY1]], [[ANDi]], [[COPY2]]
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; MIPS32FP32: $v0 = COPY [[MOVN_I_I]]
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; MIPS32FP32: RetRA implicit $v0
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; MIPS32FP64-LABEL: name: select_ptr
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; MIPS32FP64: liveins: $a0, $a1, $a2
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; MIPS32FP64: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
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; MIPS32FP64: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1
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; MIPS32FP64: [[COPY2:%[0-9]+]]:gpr32 = COPY $a2
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; MIPS32FP64: [[ANDi:%[0-9]+]]:gpr32 = ANDi [[COPY]], 1
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; MIPS32FP64: [[MOVN_I_I:%[0-9]+]]:gpr32 = MOVN_I_I [[COPY1]], [[ANDi]], [[COPY2]]
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; MIPS32FP64: $v0 = COPY [[MOVN_I_I]]
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; MIPS32FP64: RetRA implicit $v0
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%3:gprb(s32) = COPY $a0
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%1:gprb(p0) = COPY $a1
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%2:gprb(p0) = COPY $a2
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%6:gprb(s32) = G_CONSTANT i32 1
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%7:gprb(s32) = COPY %3(s32)
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%5:gprb(s32) = G_AND %7, %6
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%4:gprb(p0) = G_SELECT %5(s32), %1, %2
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$v0 = COPY %4(p0)
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RetRA implicit $v0
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...
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---
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name: select_float
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.1.entry:
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liveins: $a0, $a1, $a2
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; MIPS32FP32-LABEL: name: select_float
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; MIPS32FP32: liveins: $a0, $a1, $a2
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; MIPS32FP32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
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; MIPS32FP32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1
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; MIPS32FP32: [[COPY2:%[0-9]+]]:gpr32 = COPY $a2
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; MIPS32FP32: [[ANDi:%[0-9]+]]:gpr32 = ANDi [[COPY]], 1
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; MIPS32FP32: [[COPY3:%[0-9]+]]:fgr32 = COPY [[COPY1]]
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; MIPS32FP32: [[COPY4:%[0-9]+]]:fgr32 = COPY [[COPY2]]
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; MIPS32FP32: [[MOVN_I_S:%[0-9]+]]:fgr32 = MOVN_I_S [[COPY3]], [[ANDi]], [[COPY4]]
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; MIPS32FP32: $f0 = COPY [[MOVN_I_S]]
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; MIPS32FP32: RetRA implicit $f0
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; MIPS32FP64-LABEL: name: select_float
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; MIPS32FP64: liveins: $a0, $a1, $a2
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; MIPS32FP64: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
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; MIPS32FP64: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1
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; MIPS32FP64: [[COPY2:%[0-9]+]]:gpr32 = COPY $a2
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; MIPS32FP64: [[ANDi:%[0-9]+]]:gpr32 = ANDi [[COPY]], 1
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; MIPS32FP64: [[COPY3:%[0-9]+]]:fgr32 = COPY [[COPY1]]
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; MIPS32FP64: [[COPY4:%[0-9]+]]:fgr32 = COPY [[COPY2]]
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; MIPS32FP64: [[MOVN_I_S:%[0-9]+]]:fgr32 = MOVN_I_S [[COPY3]], [[ANDi]], [[COPY4]]
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; MIPS32FP64: $f0 = COPY [[MOVN_I_S]]
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; MIPS32FP64: RetRA implicit $f0
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%3:gprb(s32) = COPY $a0
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%1:gprb(s32) = COPY $a1
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%2:gprb(s32) = COPY $a2
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%6:gprb(s32) = G_CONSTANT i32 1
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%7:gprb(s32) = COPY %3(s32)
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%5:gprb(s32) = G_AND %7, %6
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%8:fprb(s32) = COPY %1(s32)
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%9:fprb(s32) = COPY %2(s32)
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%4:fprb(s32) = G_SELECT %5(s32), %8, %9
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$f0 = COPY %4(s32)
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RetRA implicit $f0
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...
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---
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name: select_double
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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fixedStack:
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- { id: 0, offset: 16, size: 4, alignment: 8, isImmutable: true }
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body: |
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bb.1.entry:
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liveins: $d6, $d7
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; MIPS32FP32-LABEL: name: select_double
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; MIPS32FP32: liveins: $d6, $d7
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; MIPS32FP32: [[COPY:%[0-9]+]]:afgr64 = COPY $d6
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; MIPS32FP32: [[COPY1:%[0-9]+]]:afgr64 = COPY $d7
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; MIPS32FP32: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu %fixed-stack.0, 0
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; MIPS32FP32: [[LW:%[0-9]+]]:gpr32 = LW [[ADDiu]], 0 :: (load 4 from %fixed-stack.0, align 8)
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; MIPS32FP32: [[ANDi:%[0-9]+]]:gpr32 = ANDi [[LW]], 1
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; MIPS32FP32: [[MOVN_I_D32_:%[0-9]+]]:afgr64 = MOVN_I_D32 [[COPY]], [[ANDi]], [[COPY1]]
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; MIPS32FP32: $d0 = COPY [[MOVN_I_D32_]]
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; MIPS32FP32: RetRA implicit $d0
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; MIPS32FP64-LABEL: name: select_double
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; MIPS32FP64: liveins: $d6, $d7
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; MIPS32FP64: [[COPY:%[0-9]+]]:fgr64 = COPY $d6
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; MIPS32FP64: [[COPY1:%[0-9]+]]:fgr64 = COPY $d7
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; MIPS32FP64: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu %fixed-stack.0, 0
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; MIPS32FP64: [[LW:%[0-9]+]]:gpr32 = LW [[ADDiu]], 0 :: (load 4 from %fixed-stack.0, align 8)
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; MIPS32FP64: [[ANDi:%[0-9]+]]:gpr32 = ANDi [[LW]], 1
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; MIPS32FP64: [[MOVN_I_D64_:%[0-9]+]]:fgr64 = MOVN_I_D64 [[COPY]], [[ANDi]], [[COPY1]]
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; MIPS32FP64: $d0 = COPY [[MOVN_I_D64_]]
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; MIPS32FP64: RetRA implicit $d0
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%0:fprb(s64) = COPY $d6
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%1:fprb(s64) = COPY $d7
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%4:gprb(p0) = G_FRAME_INDEX %fixed-stack.0
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%3:gprb(s32) = G_LOAD %4(p0) :: (load 4 from %fixed-stack.0, align 8)
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%7:gprb(s32) = G_CONSTANT i32 1
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%8:gprb(s32) = COPY %3(s32)
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%6:gprb(s32) = G_AND %8, %7
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%5:fprb(s64) = G_SELECT %6(s32), %0, %1
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$d0 = COPY %5(s64)
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RetRA implicit $d0
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...
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