llvm-for-llvmta/test/CodeGen/MIR/X86/stack-object-operands.mir

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2022-04-25 10:02:23 +02:00
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -march=x86 -run-pass none -o - %s | FileCheck %s
# This test ensures that the MIR parser parses stack object machine operands
# correctly.
--- |
define i32 @test(i32 %a) {
entry:
%b = alloca i32
%0 = alloca i32
store i32 %a, i32* %b
store i32 2, i32* %0
%c = load i32, i32* %b
ret i32 %c
}
...
---
name: test
tracksRegLiveness: true
registers:
- { id: 0, class: gr32 }
- { id: 1, class: gr32 }
frameInfo:
maxAlignment: 4
fixedStack:
- { id: 0, offset: 0, size: 4, isImmutable: true, isAliased: false }
stack:
- { id: 0, name: b, size: 4, alignment: 4 }
- { id: 1, size: 4, alignment: 4 }
body: |
bb.0.entry:
; CHECK-LABEL: name: test
; CHECK: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm %fixed-stack.0, 1, $noreg, 0, $noreg
; CHECK: MOV32mr %stack.0.b, 1, $noreg, 0, $noreg, [[MOV32rm]]
; CHECK: MOV32mi %stack.1, 1, $noreg, 0, $noreg, 2
; CHECK: [[MOV32rm1:%[0-9]+]]:gr32 = MOV32rm %stack.0.b, 1, $noreg, 0, $noreg
; CHECK: $eax = COPY [[MOV32rm1]]
; CHECK: RETL $eax
%0 = MOV32rm %fixed-stack.0, 1, _, 0, _
MOV32mr %stack.0.b, 1, _, 0, _, %0
MOV32mi %stack.1, 1, _, 0, _, 2
%1 = MOV32rm %stack.0, 1, _, 0, _
$eax = COPY %1
RETL $eax
...