35 lines
1.6 KiB
LLVM
35 lines
1.6 KiB
LLVM
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; RUN: llc -march=hexagon < %s | FileCheck %s
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; This test checks that S2_tstbit_i instruction is generated
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; and it does not assert.
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; CHECK: p{{[0-9]+}} = tstbit
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target triple = "hexagon-unknown-unknown-elf"
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%struct.hlist_node.45.966.3115.3729.4036.4650.4957.6492.6799.7413.7720.9562.10790.11097.11404.11711.14474.17192 = type { %struct.hlist_node.45.966.3115.3729.4036.4650.4957.6492.6799.7413.7720.9562.10790.11097.11404.11711.14474.17192*, %struct.hlist_node.45.966.3115.3729.4036.4650.4957.6492.6799.7413.7720.9562.10790.11097.11404.11711.14474.17192** }
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@.str.8 = external dso_local unnamed_addr constant [5 x i8], align 1
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declare dso_local void @panic(i8*, ...) local_unnamed_addr
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define dso_local fastcc void @elv_rqhash_find() unnamed_addr {
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entry:
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%cmd_flags = getelementptr inbounds %struct.hlist_node.45.966.3115.3729.4036.4650.4957.6492.6799.7413.7720.9562.10790.11097.11404.11711.14474.17192, %struct.hlist_node.45.966.3115.3729.4036.4650.4957.6492.6799.7413.7720.9562.10790.11097.11404.11711.14474.17192* null, i32 -5
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%0 = bitcast %struct.hlist_node.45.966.3115.3729.4036.4650.4957.6492.6799.7413.7720.9562.10790.11097.11404.11711.14474.17192* %cmd_flags to i64*
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%1 = load i64, i64* %0, align 8
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%2 = and i64 %1, 4294967296
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%tobool10 = icmp eq i64 %2, 0
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br i1 %tobool10, label %do.body11, label %do.end14
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do.body11: ; preds = %entry
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tail call void (i8*, ...) @panic(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.8, i32 0, i32 0)) #1
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unreachable
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do.end14: ; preds = %entry
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%and.i = and i64 %1, -4294967297
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store i64 %and.i, i64* %0, align 8
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ret void
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}
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