73 lines
2.4 KiB
Plaintext
73 lines
2.4 KiB
Plaintext
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect %s -verify-machineinstrs -o - -regbankselect-fast | FileCheck %s
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# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect %s -verify-machineinstrs -o - -regbankselect-greedy | FileCheck %s
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---
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name: class_ss
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legalized: true
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body: |
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bb.0:
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liveins: $sgpr0_sgpr1, $sgpr2
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; CHECK-LABEL: name: class_ss
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; CHECK: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr1
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; CHECK: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr2
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; CHECK: [[COPY2:%[0-9]+]]:vgpr(s64) = COPY [[COPY]](s64)
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; CHECK: [[COPY3:%[0-9]+]]:vgpr(s32) = COPY [[COPY1]](s32)
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; CHECK: [[INT:%[0-9]+]]:vcc(s1) = G_INTRINSIC intrinsic(@llvm.amdgcn.class), [[COPY2]](s64), [[COPY3]](s32)
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%0:_(s64) = COPY $sgpr0_sgpr1
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%1:_(s32) = COPY $sgpr2
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%2:_(s1) = G_INTRINSIC intrinsic(@llvm.amdgcn.class), %0, %1
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...
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---
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name: class_sv
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legalized: true
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body: |
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bb.0:
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liveins: $sgpr0_sgpr1, $vgpr0
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; CHECK-LABEL: name: class_sv
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; CHECK: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr1
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; CHECK: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
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; CHECK: [[COPY2:%[0-9]+]]:vgpr(s64) = COPY [[COPY]](s64)
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; CHECK: [[INT:%[0-9]+]]:vcc(s1) = G_INTRINSIC intrinsic(@llvm.amdgcn.class), [[COPY2]](s64), [[COPY1]](s32)
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%0:_(s64) = COPY $sgpr0_sgpr1
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%1:_(s32) = COPY $vgpr0
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%2:_(s1) = G_INTRINSIC intrinsic(@llvm.amdgcn.class), %0, %1
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...
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---
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name: class_vs
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legalized: true
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1, $sgpr0
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; CHECK-LABEL: name: class_vs
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; CHECK: [[COPY:%[0-9]+]]:vgpr(s64) = COPY $vgpr0_vgpr1
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; CHECK: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
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; CHECK: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY [[COPY1]](s32)
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; CHECK: [[INT:%[0-9]+]]:vcc(s1) = G_INTRINSIC intrinsic(@llvm.amdgcn.class), [[COPY]](s64), [[COPY2]](s32)
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%0:_(s64) = COPY $vgpr0_vgpr1
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%1:_(s32) = COPY $sgpr0
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%2:_(s1) = G_INTRINSIC intrinsic(@llvm.amdgcn.class), %0, %1
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...
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---
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name: class_vv
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legalized: true
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body: |
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bb.0:
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liveins: $vgpr0, $vgpr1
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; CHECK-LABEL: name: class_vv
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; CHECK: [[COPY:%[0-9]+]]:vgpr(s64) = COPY $vgpr0_vgpr1
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; CHECK: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr2
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; CHECK: [[INT:%[0-9]+]]:vcc(s1) = G_INTRINSIC intrinsic(@llvm.amdgcn.class), [[COPY]](s64), [[COPY1]](s32)
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%0:_(s64) = COPY $vgpr0_vgpr1
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%1:_(s32) = COPY $vgpr2
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%2:_(s1) = G_INTRINSIC intrinsic(@llvm.amdgcn.class), %0, %1
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...
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