102 lines
4.1 KiB
Plaintext
102 lines
4.1 KiB
Plaintext
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=hawaii -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck -check-prefix=WAVE64 %s
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# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1010 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck -check-prefix=WAVE32 %s
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---
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name: sitofp
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $sgpr0, $vgpr0, $vgpr3_vgpr4
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; WAVE64-LABEL: name: sitofp
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; WAVE64: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; WAVE64: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; WAVE64: [[COPY2:%[0-9]+]]:vreg_64 = COPY $vgpr3_vgpr4
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; WAVE64: [[V_CVT_F32_I32_e64_:%[0-9]+]]:vgpr_32 = V_CVT_F32_I32_e64 [[COPY]], 0, 0, implicit $mode, implicit $exec
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; WAVE64: [[V_CVT_F32_I32_e64_1:%[0-9]+]]:vgpr_32 = V_CVT_F32_I32_e64 [[COPY1]], 0, 0, implicit $mode, implicit $exec
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; WAVE64: FLAT_STORE_DWORD [[COPY2]], [[V_CVT_F32_I32_e64_]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (store 4, addrspace 1)
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; WAVE64: FLAT_STORE_DWORD [[COPY2]], [[V_CVT_F32_I32_e64_1]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (store 4, addrspace 1)
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; WAVE32-LABEL: name: sitofp
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; WAVE32: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; WAVE32: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; WAVE32: [[COPY2:%[0-9]+]]:vreg_64 = COPY $vgpr3_vgpr4
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; WAVE32: [[V_CVT_F32_I32_e64_:%[0-9]+]]:vgpr_32 = V_CVT_F32_I32_e64 [[COPY]], 0, 0, implicit $mode, implicit $exec
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; WAVE32: [[V_CVT_F32_I32_e64_1:%[0-9]+]]:vgpr_32 = V_CVT_F32_I32_e64 [[COPY1]], 0, 0, implicit $mode, implicit $exec
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; WAVE32: GLOBAL_STORE_DWORD [[COPY2]], [[V_CVT_F32_I32_e64_]], 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1)
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; WAVE32: GLOBAL_STORE_DWORD [[COPY2]], [[V_CVT_F32_I32_e64_1]], 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1)
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%0:sgpr(s32) = COPY $sgpr0
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%1:vgpr(s32) = COPY $vgpr0
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%2:vgpr(p1) = COPY $vgpr3_vgpr4
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; sitofp s
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%3:vgpr(s32) = G_SITOFP %0
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; sitofp v
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%4:vgpr(s32) = G_SITOFP %1
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G_STORE %3, %2 :: (store 4, addrspace 1)
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G_STORE %4, %2 :: (store 4, addrspace 1)
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...
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---
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name: sitofp_s32_to_s16_vv
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $vgpr0
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; WAVE64-LABEL: name: sitofp_s32_to_s16_vv
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; WAVE64: liveins: $vgpr0
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; WAVE64: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; WAVE64: [[V_CVT_F32_I32_e32_:%[0-9]+]]:vgpr_32 = V_CVT_F32_I32_e32 [[COPY]], implicit $mode, implicit $exec
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; WAVE64: %1:vgpr_32 = nofpexcept V_CVT_F16_F32_e32 [[V_CVT_F32_I32_e32_]], implicit $mode, implicit $exec
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; WAVE64: $vgpr0 = COPY %1
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; WAVE32-LABEL: name: sitofp_s32_to_s16_vv
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; WAVE32: liveins: $vgpr0
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; WAVE32: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; WAVE32: [[V_CVT_F32_I32_e32_:%[0-9]+]]:vgpr_32 = V_CVT_F32_I32_e32 [[COPY]], implicit $mode, implicit $exec
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; WAVE32: %1:vgpr_32 = nofpexcept V_CVT_F16_F32_e32 [[V_CVT_F32_I32_e32_]], implicit $mode, implicit $exec
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; WAVE32: $vgpr0 = COPY %1
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%0:vgpr(s32) = COPY $vgpr0
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%1:vgpr(s16) = G_SITOFP %0
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%2:vgpr(s32) = G_ANYEXT %1
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$vgpr0 = COPY %2
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...
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---
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name: sitofp_s32_to_s16_vs
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $sgpr0
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; WAVE64-LABEL: name: sitofp_s32_to_s16_vs
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; WAVE64: liveins: $sgpr0
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; WAVE64: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; WAVE64: [[V_CVT_F32_I32_e32_:%[0-9]+]]:vgpr_32 = V_CVT_F32_I32_e32 [[COPY]], implicit $mode, implicit $exec
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; WAVE64: %1:vgpr_32 = nofpexcept V_CVT_F16_F32_e32 [[V_CVT_F32_I32_e32_]], implicit $mode, implicit $exec
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; WAVE64: $vgpr0 = COPY %1
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; WAVE32-LABEL: name: sitofp_s32_to_s16_vs
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; WAVE32: liveins: $sgpr0
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; WAVE32: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; WAVE32: [[V_CVT_F32_I32_e32_:%[0-9]+]]:vgpr_32 = V_CVT_F32_I32_e32 [[COPY]], implicit $mode, implicit $exec
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; WAVE32: %1:vgpr_32 = nofpexcept V_CVT_F16_F32_e32 [[V_CVT_F32_I32_e32_]], implicit $mode, implicit $exec
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; WAVE32: $vgpr0 = COPY %1
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%0:sgpr(s32) = COPY $sgpr0
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%1:vgpr(s16) = G_SITOFP %0
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%2:vgpr(s32) = G_ANYEXT %1
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$vgpr0 = COPY %2
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...
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