llvm-for-llvmta/test/CodeGen/AMDGPU/GlobalISel/inst-select-ffloor.s16.mir

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2022-04-25 10:02:23 +02:00
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=instruction-select -global-isel-abort=0 -verify-machineinstrs -o - %s | FileCheck -check-prefix=VI %s
---
name: ffloor_s16_ss
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
bb.0:
liveins: $sgpr0
; VI-LABEL: name: ffloor_s16_ss
; VI: liveins: $sgpr0
; VI: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
; VI: [[TRUNC:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY]](s32)
; VI: [[FFLOOR:%[0-9]+]]:sreg_32(s16) = G_FFLOOR [[TRUNC]]
; VI: [[COPY1:%[0-9]+]]:sreg_32(s32) = COPY [[FFLOOR]](s16)
; VI: $sgpr0 = COPY [[COPY1]](s32)
%0:sgpr(s32) = COPY $sgpr0
%1:sgpr(s16) = G_TRUNC %0
%2:sgpr(s16) = G_FFLOOR %1
%3:sgpr(s32) = G_ANYEXT %2
$sgpr0 = COPY %3
...
---
name: ffloor_s16_vv
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; VI-LABEL: name: ffloor_s16_vv
; VI: liveins: $vgpr0
; VI: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; VI: %2:vgpr_32 = nofpexcept V_FLOOR_F16_e64 0, [[COPY]], 0, 0, implicit $mode, implicit $exec
; VI: $vgpr0 = COPY %2
%0:vgpr(s32) = COPY $vgpr0
%1:vgpr(s16) = G_TRUNC %0
%2:vgpr(s16) = G_FFLOOR %1
%3:vgpr(s32) = G_ANYEXT %2
$vgpr0 = COPY %3
...
---
name: ffloor_s16_vs
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
bb.0:
liveins: $sgpr0
; VI-LABEL: name: ffloor_s16_vs
; VI: liveins: $sgpr0
; VI: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
; VI: %2:vgpr_32 = nofpexcept V_FLOOR_F16_e64 0, [[COPY]], 0, 0, implicit $mode, implicit $exec
; VI: $vgpr0 = COPY %2
%0:sgpr(s32) = COPY $sgpr0
%1:sgpr(s16) = G_TRUNC %0
%2:vgpr(s16) = G_FFLOOR %1
%3:vgpr(s32) = G_ANYEXT %2
$vgpr0 = COPY %3
...
---
name: ffloor_fneg_s16_vv
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; SI-LABEL: name: ffloor_fneg_s16_vv
; SI: liveins: $vgpr0
; SI: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
; SI: [[TRUNC:%[0-9]+]]:vgpr(s16) = G_TRUNC [[COPY]](s32)
; SI: [[FNEG:%[0-9]+]]:vgpr(s16) = G_FNEG [[TRUNC]]
; SI: [[FFLOOR:%[0-9]+]]:vgpr(s16) = G_FFLOOR [[FNEG]]
; SI: [[ANYEXT:%[0-9]+]]:vgpr(s32) = G_ANYEXT [[FFLOOR]](s16)
; SI: $vgpr0 = COPY [[ANYEXT]](s32)
; VI-LABEL: name: ffloor_fneg_s16_vv
; VI: liveins: $vgpr0
; VI: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; VI: %3:vgpr_32 = nofpexcept V_FLOOR_F16_e64 1, [[COPY]], 0, 0, implicit $mode, implicit $exec
; VI: $vgpr0 = COPY %3
%0:vgpr(s32) = COPY $vgpr0
%1:vgpr(s16) = G_TRUNC %0
%2:vgpr(s16) = G_FNEG %1
%3:vgpr(s16) = G_FFLOOR %2
%4:vgpr(s32) = G_ANYEXT %3
$vgpr0 = COPY %4
...