llvm-for-llvmta/test/CodeGen/AArch64/GlobalISel/store-wro-addressing-modes.mir

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2022-04-25 10:02:23 +02:00
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=aarch64-unknown-unknown -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
---
name: strwrow
alignment: 4
legalized: true
regBankSelected: true
tracksRegLiveness: true
machineFunctionInfo: {}
body: |
bb.0:
liveins: $x0, $x1, $w2
; CHECK-LABEL: name: strwrow
; CHECK: liveins: $x0, $x1, $w2
; CHECK: %base:gpr64sp = COPY $x0
; CHECK: %foo:gpr32 = COPY $w1
; CHECK: %dst:gpr32 = COPY $w2
; CHECK: STRWroW %dst, %base, %foo, 1, 1 :: (store 4)
%base:gpr(p0) = COPY $x0
%foo:gpr(s32) = COPY $w1
%ext:gpr(s64) = G_SEXT %foo(s32)
%c:gpr(s64) = G_CONSTANT i64 2
%offset:gpr(s64) = G_SHL %ext, %c
%ptr:gpr(p0) = G_PTR_ADD %base, %offset(s64)
%dst:gpr(s32) = COPY $w2
G_STORE %dst, %ptr :: (store 4)
...
---
name: strxrow
alignment: 4
legalized: true
regBankSelected: true
tracksRegLiveness: true
machineFunctionInfo: {}
body: |
bb.0:
liveins: $x0, $x1, $x2
; CHECK-LABEL: name: strxrow
; CHECK: liveins: $x0, $x1, $x2
; CHECK: %base:gpr64sp = COPY $x0
; CHECK: %foo:gpr32 = COPY $w1
; CHECK: %dst:gpr64 = COPY $x2
; CHECK: STRXroW %dst, %base, %foo, 1, 1 :: (store 8)
%base:gpr(p0) = COPY $x0
%foo:gpr(s32) = COPY $w1
%ext:gpr(s64) = G_SEXT %foo(s32)
%c:gpr(s64) = G_CONSTANT i64 3
%offset:gpr(s64) = G_SHL %ext, %c
%ptr:gpr(p0) = G_PTR_ADD %base, %offset(s64)
%dst:gpr(s64) = COPY $x2
G_STORE %dst, %ptr :: (store 8)
...