623 lines
15 KiB
Plaintext
623 lines
15 KiB
Plaintext
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=aarch64-- -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
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--- |
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target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
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define void @store_s64_gpr(i64* %addr) { ret void }
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define void @store_s32_gpr(i32* %addr) { ret void }
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define void @store_s16_gpr(i16* %addr) { ret void }
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define void @store_s8_gpr(i8* %addr) { ret void }
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define void @store_zero_s64_gpr(i64* %addr) { ret void }
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define void @store_zero_s32_gpr(i32* %addr) { ret void }
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define void @store_zero_s16(i32* %addr) { ret void }
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define void @store_zero_s8(i32* %addr) { ret void }
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define void @store_zero_look_through_cst(i32* %addr) { ret void }
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define void @store_fi_s64_gpr() {
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%ptr0 = alloca i64
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ret void
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}
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define void @store_gep_128_s64_gpr(i64* %addr) { ret void }
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define void @store_gep_512_s32_gpr(i32* %addr) { ret void }
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define void @store_gep_64_s16_gpr(i16* %addr) { ret void }
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define void @store_gep_1_s8_gpr(i8* %addr) { ret void }
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define void @store_s64_fpr(i64* %addr) { ret void }
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define void @store_s32_fpr(i32* %addr) { ret void }
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define void @store_gep_8_s64_fpr(i64* %addr) { ret void }
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define void @store_gep_8_s32_fpr(i32* %addr) { ret void }
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define void @store_v2s32(i64 *%addr) { ret void }
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define void @store_v2s64(i64 *%addr) { ret void }
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define void @store_4xi16(<4 x i16> %v, <4 x i16>* %ptr) { ret void }
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define void @store_4xi32(<4 x i32> %v, <4 x i32>* %ptr) { ret void }
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define void @store_8xi16(<8 x i16> %v, <8 x i16>* %ptr) { ret void }
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define void @store_16xi8(<16 x i8> %v, <16 x i8>* %ptr) { ret void }
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@x = external hidden local_unnamed_addr global i32*, align 8
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define void @store_adrp_add_low() { ret void }
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...
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---
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name: store_s64_gpr
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legalized: true
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regBankSelected: true
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registers:
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- { id: 0, class: gpr }
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- { id: 1, class: gpr }
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body: |
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bb.0:
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liveins: $x0, $x1
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; CHECK-LABEL: name: store_s64_gpr
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; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
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; CHECK: [[COPY1:%[0-9]+]]:gpr64 = COPY $x1
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; CHECK: STRXui [[COPY1]], [[COPY]], 0 :: (store 8 into %ir.addr)
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%0(p0) = COPY $x0
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%1(s64) = COPY $x1
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G_STORE %1, %0 :: (store 8 into %ir.addr)
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...
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---
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name: store_s32_gpr
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legalized: true
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regBankSelected: true
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registers:
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- { id: 0, class: gpr }
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- { id: 1, class: gpr }
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body: |
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bb.0:
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liveins: $x0, $w1
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; CHECK-LABEL: name: store_s32_gpr
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; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
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; CHECK: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
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; CHECK: STRWui [[COPY1]], [[COPY]], 0 :: (store 4 into %ir.addr)
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%0(p0) = COPY $x0
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%1(s32) = COPY $w1
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G_STORE %1, %0 :: (store 4 into %ir.addr)
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...
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---
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name: store_s16_gpr
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legalized: true
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regBankSelected: true
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registers:
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- { id: 0, class: gpr }
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- { id: 1, class: gpr }
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body: |
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bb.0:
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liveins: $x0, $w1
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; CHECK-LABEL: name: store_s16_gpr
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; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
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; CHECK: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
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; CHECK: STRHHui [[COPY1]], [[COPY]], 0 :: (store 2 into %ir.addr)
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%0(p0) = COPY $x0
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%2:gpr(s32) = COPY $w1
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%1(s16) = G_TRUNC %2
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G_STORE %1, %0 :: (store 2 into %ir.addr)
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...
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---
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name: store_s8_gpr
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legalized: true
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regBankSelected: true
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registers:
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- { id: 0, class: gpr }
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- { id: 1, class: gpr }
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body: |
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bb.0:
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liveins: $x0, $w1
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; CHECK-LABEL: name: store_s8_gpr
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; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
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; CHECK: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
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; CHECK: STRBBui [[COPY1]], [[COPY]], 0 :: (store 1 into %ir.addr)
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%0(p0) = COPY $x0
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%2:gpr(s32) = COPY $w1
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%1(s8) = G_TRUNC %2
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G_STORE %1, %0 :: (store 1 into %ir.addr)
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...
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---
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name: store_zero_s64_gpr
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legalized: true
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regBankSelected: true
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registers:
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- { id: 0, class: gpr }
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- { id: 1, class: gpr }
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body: |
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bb.0:
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liveins: $x0, $x1
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; CHECK-LABEL: name: store_zero_s64_gpr
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; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
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; CHECK: STRXui $xzr, [[COPY]], 0 :: (store 8 into %ir.addr)
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%0(p0) = COPY $x0
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%1(s64) = G_CONSTANT i64 0
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G_STORE %1, %0 :: (store 8 into %ir.addr)
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...
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---
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name: store_zero_s32_gpr
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legalized: true
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regBankSelected: true
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registers:
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- { id: 0, class: gpr }
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- { id: 1, class: gpr }
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body: |
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bb.0:
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liveins: $x0
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; CHECK-LABEL: name: store_zero_s32_gpr
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; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
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; CHECK: STRWui $wzr, [[COPY]], 0 :: (store 4 into %ir.addr)
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%0(p0) = COPY $x0
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%1(s32) = G_CONSTANT i32 0
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G_STORE %1, %0 :: (store 4 into %ir.addr)
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...
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---
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name: store_zero_s16
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $x0
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; CHECK-LABEL: name: store_zero_s16
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; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
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; CHECK: STRHHui $wzr, [[COPY]], 0 :: (store 2)
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%0:gpr(p0) = COPY $x0
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%1:gpr(s16) = G_CONSTANT i16 0
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G_STORE %1(s16), %0(p0) :: (store 2)
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...
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---
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name: store_zero_s8
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $x0
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; CHECK-LABEL: name: store_zero_s8
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; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
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; CHECK: STRBBui $wzr, [[COPY]], 0 :: (store 1)
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%0:gpr(p0) = COPY $x0
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%1:gpr(s8) = G_CONSTANT i8 0
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G_STORE %1(s8), %0(p0) :: (store 1)
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...
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---
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name: store_zero_look_through_cst
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $x0
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; CHECK-LABEL: name: store_zero_look_through_cst
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; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
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; CHECK: STRXui $xzr, [[COPY]], 0 :: (store 8 into %ir.addr)
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%0:gpr(p0) = COPY $x0
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%1:gpr(s32) = G_CONSTANT i32 0
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%2:gpr(s64) = G_ZEXT %1
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G_STORE %2, %0 :: (store 8 into %ir.addr)
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...
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---
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name: store_fi_s64_gpr
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legalized: true
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regBankSelected: true
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registers:
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- { id: 0, class: gpr }
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- { id: 1, class: gpr }
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stack:
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- { id: 0, name: ptr0, offset: 0, size: 8, alignment: 8 }
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body: |
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bb.0:
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liveins: $x0
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; CHECK-LABEL: name: store_fi_s64_gpr
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; CHECK: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
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; CHECK: STRXui [[COPY]], %stack.0.ptr0, 0 :: (store 8)
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%0(p0) = COPY $x0
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%1(p0) = G_FRAME_INDEX %stack.0.ptr0
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G_STORE %0, %1 :: (store 8)
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...
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---
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name: store_gep_128_s64_gpr
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legalized: true
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regBankSelected: true
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registers:
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- { id: 0, class: gpr }
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- { id: 1, class: gpr }
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- { id: 2, class: gpr }
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- { id: 3, class: gpr }
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body: |
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bb.0:
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liveins: $x0, $x1
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; CHECK-LABEL: name: store_gep_128_s64_gpr
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; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
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; CHECK: [[COPY1:%[0-9]+]]:gpr64 = COPY $x1
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; CHECK: STRXui [[COPY1]], [[COPY]], 16 :: (store 8 into %ir.addr)
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%0(p0) = COPY $x0
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%1(s64) = COPY $x1
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%2(s64) = G_CONSTANT i64 128
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%3(p0) = G_PTR_ADD %0, %2
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G_STORE %1, %3 :: (store 8 into %ir.addr)
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...
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---
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name: store_gep_512_s32_gpr
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legalized: true
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regBankSelected: true
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registers:
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- { id: 0, class: gpr }
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- { id: 1, class: gpr }
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- { id: 2, class: gpr }
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- { id: 3, class: gpr }
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body: |
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bb.0:
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liveins: $x0, $w1
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; CHECK-LABEL: name: store_gep_512_s32_gpr
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; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
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; CHECK: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
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; CHECK: STRWui [[COPY1]], [[COPY]], 128 :: (store 4 into %ir.addr)
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%0(p0) = COPY $x0
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%1(s32) = COPY $w1
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%2(s64) = G_CONSTANT i64 512
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%3(p0) = G_PTR_ADD %0, %2
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G_STORE %1, %3 :: (store 4 into %ir.addr)
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...
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---
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name: store_gep_64_s16_gpr
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legalized: true
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regBankSelected: true
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registers:
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- { id: 0, class: gpr }
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- { id: 1, class: gpr }
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- { id: 2, class: gpr }
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- { id: 3, class: gpr }
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body: |
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bb.0:
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liveins: $x0, $w1
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; CHECK-LABEL: name: store_gep_64_s16_gpr
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; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
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; CHECK: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
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; CHECK: STRHHui [[COPY1]], [[COPY]], 32 :: (store 2 into %ir.addr)
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%0(p0) = COPY $x0
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%4:gpr(s32) = COPY $w1
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%1(s16) = G_TRUNC %4
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%2(s64) = G_CONSTANT i64 64
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%3(p0) = G_PTR_ADD %0, %2
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G_STORE %1, %3 :: (store 2 into %ir.addr)
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...
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---
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name: store_gep_1_s8_gpr
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legalized: true
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regBankSelected: true
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registers:
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- { id: 0, class: gpr }
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- { id: 1, class: gpr }
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- { id: 2, class: gpr }
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- { id: 3, class: gpr }
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body: |
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bb.0:
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liveins: $x0, $w1
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; CHECK-LABEL: name: store_gep_1_s8_gpr
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|
|
; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
|
||
|
|
; CHECK: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
|
||
|
|
; CHECK: STRBBui [[COPY1]], [[COPY]], 1 :: (store 1 into %ir.addr)
|
||
|
|
%0(p0) = COPY $x0
|
||
|
|
%4:gpr(s32) = COPY $w1
|
||
|
|
%1(s8) = G_TRUNC %4
|
||
|
|
%2(s64) = G_CONSTANT i64 1
|
||
|
|
%3(p0) = G_PTR_ADD %0, %2
|
||
|
|
G_STORE %1, %3 :: (store 1 into %ir.addr)
|
||
|
|
...
|
||
|
|
|
||
|
|
---
|
||
|
|
name: store_s64_fpr
|
||
|
|
legalized: true
|
||
|
|
regBankSelected: true
|
||
|
|
|
||
|
|
registers:
|
||
|
|
- { id: 0, class: gpr }
|
||
|
|
- { id: 1, class: fpr }
|
||
|
|
|
||
|
|
body: |
|
||
|
|
bb.0:
|
||
|
|
liveins: $x0, $d1
|
||
|
|
|
||
|
|
; CHECK-LABEL: name: store_s64_fpr
|
||
|
|
; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
|
||
|
|
; CHECK: [[COPY1:%[0-9]+]]:fpr64 = COPY $d1
|
||
|
|
; CHECK: STRDui [[COPY1]], [[COPY]], 0 :: (store 8 into %ir.addr)
|
||
|
|
%0(p0) = COPY $x0
|
||
|
|
%1(s64) = COPY $d1
|
||
|
|
G_STORE %1, %0 :: (store 8 into %ir.addr)
|
||
|
|
|
||
|
|
...
|
||
|
|
|
||
|
|
---
|
||
|
|
name: store_s32_fpr
|
||
|
|
legalized: true
|
||
|
|
regBankSelected: true
|
||
|
|
|
||
|
|
registers:
|
||
|
|
- { id: 0, class: gpr }
|
||
|
|
- { id: 1, class: fpr }
|
||
|
|
|
||
|
|
body: |
|
||
|
|
bb.0:
|
||
|
|
liveins: $x0, $s1
|
||
|
|
|
||
|
|
; CHECK-LABEL: name: store_s32_fpr
|
||
|
|
; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
|
||
|
|
; CHECK: [[COPY1:%[0-9]+]]:fpr32 = COPY $s1
|
||
|
|
; CHECK: STRSui [[COPY1]], [[COPY]], 0 :: (store 4 into %ir.addr)
|
||
|
|
%0(p0) = COPY $x0
|
||
|
|
%1(s32) = COPY $s1
|
||
|
|
G_STORE %1, %0 :: (store 4 into %ir.addr)
|
||
|
|
|
||
|
|
...
|
||
|
|
|
||
|
|
---
|
||
|
|
name: store_gep_8_s64_fpr
|
||
|
|
legalized: true
|
||
|
|
regBankSelected: true
|
||
|
|
|
||
|
|
registers:
|
||
|
|
- { id: 0, class: gpr }
|
||
|
|
- { id: 1, class: fpr }
|
||
|
|
- { id: 2, class: gpr }
|
||
|
|
- { id: 3, class: gpr }
|
||
|
|
|
||
|
|
body: |
|
||
|
|
bb.0:
|
||
|
|
liveins: $x0, $d1
|
||
|
|
|
||
|
|
; CHECK-LABEL: name: store_gep_8_s64_fpr
|
||
|
|
; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
|
||
|
|
; CHECK: [[COPY1:%[0-9]+]]:fpr64 = COPY $d1
|
||
|
|
; CHECK: STRDui [[COPY1]], [[COPY]], 1 :: (store 8 into %ir.addr)
|
||
|
|
%0(p0) = COPY $x0
|
||
|
|
%1(s64) = COPY $d1
|
||
|
|
%2(s64) = G_CONSTANT i64 8
|
||
|
|
%3(p0) = G_PTR_ADD %0, %2
|
||
|
|
G_STORE %1, %3 :: (store 8 into %ir.addr)
|
||
|
|
...
|
||
|
|
|
||
|
|
---
|
||
|
|
name: store_gep_8_s32_fpr
|
||
|
|
legalized: true
|
||
|
|
regBankSelected: true
|
||
|
|
|
||
|
|
registers:
|
||
|
|
- { id: 0, class: gpr }
|
||
|
|
- { id: 1, class: fpr }
|
||
|
|
- { id: 2, class: gpr }
|
||
|
|
- { id: 3, class: gpr }
|
||
|
|
|
||
|
|
body: |
|
||
|
|
bb.0:
|
||
|
|
liveins: $x0, $s1
|
||
|
|
|
||
|
|
; CHECK-LABEL: name: store_gep_8_s32_fpr
|
||
|
|
; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
|
||
|
|
; CHECK: [[COPY1:%[0-9]+]]:fpr32 = COPY $s1
|
||
|
|
; CHECK: STRSui [[COPY1]], [[COPY]], 2 :: (store 4 into %ir.addr)
|
||
|
|
%0(p0) = COPY $x0
|
||
|
|
%1(s32) = COPY $s1
|
||
|
|
%2(s64) = G_CONSTANT i64 8
|
||
|
|
%3(p0) = G_PTR_ADD %0, %2
|
||
|
|
G_STORE %1, %3 :: (store 4 into %ir.addr)
|
||
|
|
...
|
||
|
|
---
|
||
|
|
name: store_v2s32
|
||
|
|
legalized: true
|
||
|
|
regBankSelected: true
|
||
|
|
|
||
|
|
registers:
|
||
|
|
- { id: 0, class: gpr }
|
||
|
|
- { id: 1, class: fpr }
|
||
|
|
|
||
|
|
body: |
|
||
|
|
bb.0:
|
||
|
|
liveins: $x0, $d1
|
||
|
|
|
||
|
|
; CHECK-LABEL: name: store_v2s32
|
||
|
|
; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
|
||
|
|
; CHECK: [[COPY1:%[0-9]+]]:fpr64 = COPY $d1
|
||
|
|
; CHECK: STRDui [[COPY1]], [[COPY]], 0 :: (store 8 into %ir.addr)
|
||
|
|
%0(p0) = COPY $x0
|
||
|
|
%1(<2 x s32>) = COPY $d1
|
||
|
|
G_STORE %1, %0 :: (store 8 into %ir.addr)
|
||
|
|
|
||
|
|
...
|
||
|
|
---
|
||
|
|
name: store_v2s64
|
||
|
|
legalized: true
|
||
|
|
regBankSelected: true
|
||
|
|
|
||
|
|
registers:
|
||
|
|
- { id: 0, class: gpr }
|
||
|
|
- { id: 1, class: fpr }
|
||
|
|
|
||
|
|
body: |
|
||
|
|
bb.0:
|
||
|
|
liveins: $x0, $d1
|
||
|
|
; CHECK-LABEL: name: store_v2s64
|
||
|
|
; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
|
||
|
|
; CHECK: [[COPY1:%[0-9]+]]:fpr128 = COPY $q1
|
||
|
|
; CHECK: STRQui [[COPY1]], [[COPY]], 0 :: (store 16 into %ir.addr, align 8)
|
||
|
|
%0(p0) = COPY $x0
|
||
|
|
%1(<2 x s64>) = COPY $q1
|
||
|
|
G_STORE %1, %0 :: (store 16 into %ir.addr, align 8)
|
||
|
|
|
||
|
|
...
|
||
|
|
---
|
||
|
|
name: store_4xi16
|
||
|
|
alignment: 4
|
||
|
|
legalized: true
|
||
|
|
regBankSelected: true
|
||
|
|
tracksRegLiveness: true
|
||
|
|
registers:
|
||
|
|
- { id: 0, class: fpr }
|
||
|
|
- { id: 1, class: gpr }
|
||
|
|
machineFunctionInfo: {}
|
||
|
|
body: |
|
||
|
|
bb.1 (%ir-block.0):
|
||
|
|
liveins: $d0, $x0
|
||
|
|
|
||
|
|
; CHECK-LABEL: name: store_4xi16
|
||
|
|
; CHECK: liveins: $d0, $x0
|
||
|
|
; CHECK: [[COPY:%[0-9]+]]:fpr64 = COPY $d0
|
||
|
|
; CHECK: [[COPY1:%[0-9]+]]:gpr64sp = COPY $x0
|
||
|
|
; CHECK: STRDui [[COPY]], [[COPY1]], 0 :: (store 8 into %ir.ptr)
|
||
|
|
; CHECK: RET_ReallyLR
|
||
|
|
%0:fpr(<4 x s16>) = COPY $d0
|
||
|
|
%1:gpr(p0) = COPY $x0
|
||
|
|
G_STORE %0(<4 x s16>), %1(p0) :: (store 8 into %ir.ptr)
|
||
|
|
RET_ReallyLR
|
||
|
|
|
||
|
|
...
|
||
|
|
---
|
||
|
|
name: store_4xi32
|
||
|
|
alignment: 4
|
||
|
|
legalized: true
|
||
|
|
regBankSelected: true
|
||
|
|
tracksRegLiveness: true
|
||
|
|
registers:
|
||
|
|
- { id: 0, class: fpr }
|
||
|
|
- { id: 1, class: gpr }
|
||
|
|
machineFunctionInfo: {}
|
||
|
|
body: |
|
||
|
|
bb.1 (%ir-block.0):
|
||
|
|
liveins: $q0, $x0
|
||
|
|
|
||
|
|
; CHECK-LABEL: name: store_4xi32
|
||
|
|
; CHECK: liveins: $q0, $x0
|
||
|
|
; CHECK: [[COPY:%[0-9]+]]:fpr128 = COPY $q0
|
||
|
|
; CHECK: [[COPY1:%[0-9]+]]:gpr64sp = COPY $x0
|
||
|
|
; CHECK: STRQui [[COPY]], [[COPY1]], 0 :: (store 16 into %ir.ptr)
|
||
|
|
; CHECK: RET_ReallyLR
|
||
|
|
%0:fpr(<4 x s32>) = COPY $q0
|
||
|
|
%1:gpr(p0) = COPY $x0
|
||
|
|
G_STORE %0(<4 x s32>), %1(p0) :: (store 16 into %ir.ptr)
|
||
|
|
RET_ReallyLR
|
||
|
|
|
||
|
|
...
|
||
|
|
---
|
||
|
|
name: store_8xi16
|
||
|
|
alignment: 4
|
||
|
|
legalized: true
|
||
|
|
regBankSelected: true
|
||
|
|
tracksRegLiveness: true
|
||
|
|
registers:
|
||
|
|
- { id: 0, class: fpr }
|
||
|
|
- { id: 1, class: gpr }
|
||
|
|
machineFunctionInfo: {}
|
||
|
|
body: |
|
||
|
|
bb.1 (%ir-block.0):
|
||
|
|
liveins: $q0, $x0
|
||
|
|
|
||
|
|
; CHECK-LABEL: name: store_8xi16
|
||
|
|
; CHECK: liveins: $q0, $x0
|
||
|
|
; CHECK: [[COPY:%[0-9]+]]:fpr128 = COPY $q0
|
||
|
|
; CHECK: [[COPY1:%[0-9]+]]:gpr64sp = COPY $x0
|
||
|
|
; CHECK: STRQui [[COPY]], [[COPY1]], 0 :: (store 16 into %ir.ptr)
|
||
|
|
; CHECK: RET_ReallyLR
|
||
|
|
%0:fpr(<8 x s16>) = COPY $q0
|
||
|
|
%1:gpr(p0) = COPY $x0
|
||
|
|
G_STORE %0(<8 x s16>), %1(p0) :: (store 16 into %ir.ptr)
|
||
|
|
RET_ReallyLR
|
||
|
|
|
||
|
|
...
|
||
|
|
---
|
||
|
|
name: store_16xi8
|
||
|
|
alignment: 4
|
||
|
|
legalized: true
|
||
|
|
regBankSelected: true
|
||
|
|
tracksRegLiveness: true
|
||
|
|
registers:
|
||
|
|
- { id: 0, class: fpr }
|
||
|
|
- { id: 1, class: gpr }
|
||
|
|
machineFunctionInfo: {}
|
||
|
|
body: |
|
||
|
|
bb.1 (%ir-block.0):
|
||
|
|
liveins: $q0, $x0
|
||
|
|
|
||
|
|
; CHECK-LABEL: name: store_16xi8
|
||
|
|
; CHECK: liveins: $q0, $x0
|
||
|
|
; CHECK: [[COPY:%[0-9]+]]:fpr128 = COPY $q0
|
||
|
|
; CHECK: [[COPY1:%[0-9]+]]:gpr64sp = COPY $x0
|
||
|
|
; CHECK: STRQui [[COPY]], [[COPY1]], 0 :: (store 16 into %ir.ptr)
|
||
|
|
; CHECK: RET_ReallyLR
|
||
|
|
%0:fpr(<16 x s8>) = COPY $q0
|
||
|
|
%1:gpr(p0) = COPY $x0
|
||
|
|
G_STORE %0(<16 x s8>), %1(p0) :: (store 16 into %ir.ptr)
|
||
|
|
RET_ReallyLR
|
||
|
|
|
||
|
|
...
|
||
|
|
---
|
||
|
|
name: store_adrp_add_low
|
||
|
|
legalized: true
|
||
|
|
regBankSelected: true
|
||
|
|
tracksRegLiveness: true
|
||
|
|
body: |
|
||
|
|
bb.0:
|
||
|
|
liveins: $x0
|
||
|
|
; CHECK-LABEL: name: store_adrp_add_low
|
||
|
|
; CHECK: liveins: $x0
|
||
|
|
; CHECK: %copy:gpr64 = COPY $x0
|
||
|
|
; CHECK: %adrp:gpr64common = ADRP target-flags(aarch64-page) @x
|
||
|
|
; CHECK: STRXui %copy, %adrp, target-flags(aarch64-pageoff, aarch64-nc) @x :: (store 8 into @x)
|
||
|
|
%copy:gpr(p0) = COPY $x0
|
||
|
|
%adrp:gpr64(p0) = ADRP target-flags(aarch64-page) @x
|
||
|
|
%add_low:gpr(p0) = G_ADD_LOW %adrp(p0), target-flags(aarch64-pageoff, aarch64-nc) @x
|
||
|
|
G_STORE %copy(p0), %add_low(p0) :: (store 8 into @x)
|