34 lines
973 B
Plaintext
34 lines
973 B
Plaintext
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=aarch64-- -mattr=+neon,+fullfp16 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
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--- |
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target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
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define void @vcvtfxu2fp_s64_fpr() { ret void }
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...
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---
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# Check that we select a 64-bit FPR vcvtfxu2fp intrinsic into UCVTFd for FPR64.
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name: vcvtfxu2fp_s64_fpr
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legalized: true
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regBankSelected: true
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registers:
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- { id: 0, class: fpr }
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- { id: 1, class: gpr }
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- { id: 2, class: fpr }
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body: |
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bb.0:
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liveins: $d0
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; CHECK-LABEL: name: vcvtfxu2fp_s64_fpr
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; CHECK: [[COPY:%[0-9]+]]:fpr64 = COPY $d0
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; CHECK: [[UCVTFd:%[0-9]+]]:fpr64 = UCVTFd [[COPY]], 12
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; CHECK: $d1 = COPY [[UCVTFd]]
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%0(s64) = COPY $d0
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%1(s32) = G_CONSTANT i32 12
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%2(s64) = G_INTRINSIC intrinsic(@llvm.aarch64.neon.vcvtfxu2fp.f64), %0, %1
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$d1 = COPY %2(s64)
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...
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