121 lines
4.4 KiB
Plaintext
121 lines
4.4 KiB
Plaintext
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=aarch64-unknown-unknown -o - -verify-machineinstrs -run-pass=instruction-select %s | FileCheck %s
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--- |
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define i32 @jt_test(i32 %x) {
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entry:
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switch i32 %x, label %return [
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i32 75, label %sw.bb
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i32 34, label %sw.bb
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i32 56, label %sw.bb
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i32 35, label %sw.bb
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i32 40, label %sw.bb
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i32 4, label %sw.bb1
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i32 5, label %sw.bb1
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i32 6, label %sw.bb1
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]
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sw.bb:
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%add = add nsw i32 %x, 42
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br label %return
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sw.bb1:
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%mul = mul nsw i32 %x, 3
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br label %return
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return:
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%retval.0 = phi i32 [ %mul, %sw.bb1 ], [ %add, %sw.bb ], [ 0, %entry ]
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ret i32 %retval.0
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}
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...
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---
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name: jt_test
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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machineFunctionInfo: {}
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jumpTable:
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kind: block-address
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entries:
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- id: 0
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blocks: [ '%bb.3', '%bb.3', '%bb.3', '%bb.4', '%bb.4', '%bb.4',
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'%bb.4', '%bb.4', '%bb.4', '%bb.4', '%bb.4', '%bb.4',
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'%bb.4', '%bb.4', '%bb.4', '%bb.4', '%bb.4', '%bb.4',
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'%bb.4', '%bb.4', '%bb.4', '%bb.4', '%bb.4', '%bb.4',
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'%bb.4', '%bb.4', '%bb.4', '%bb.4', '%bb.4', '%bb.4',
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'%bb.2', '%bb.2', '%bb.4', '%bb.4', '%bb.4', '%bb.4',
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'%bb.2', '%bb.4', '%bb.4', '%bb.4', '%bb.4', '%bb.4',
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'%bb.4', '%bb.4', '%bb.4', '%bb.4', '%bb.4', '%bb.4',
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'%bb.4', '%bb.4', '%bb.4', '%bb.4', '%bb.2', '%bb.4',
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'%bb.4', '%bb.4', '%bb.4', '%bb.4', '%bb.4', '%bb.4',
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'%bb.4', '%bb.4', '%bb.4', '%bb.4', '%bb.4', '%bb.4',
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'%bb.4', '%bb.4', '%bb.4', '%bb.4', '%bb.4', '%bb.2' ]
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body: |
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; CHECK-LABEL: name: jt_test
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; CHECK: bb.0.entry:
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; CHECK: successors: %bb.4(0x40000000), %bb.1(0x40000000)
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; CHECK: liveins: $w0
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; CHECK: [[COPY:%[0-9]+]]:gpr32common = COPY $w0
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; CHECK: [[COPY1:%[0-9]+]]:gpr32 = COPY $wzr
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; CHECK: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[COPY]], 4, 0, implicit-def $nzcv
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; CHECK: [[SUBREG_TO_REG:%[0-9]+]]:gpr64common = SUBREG_TO_REG 0, [[SUBSWri]], %subreg.sub_32
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; CHECK: [[SUBSXri:%[0-9]+]]:gpr64 = SUBSXri [[SUBREG_TO_REG]], 71, 0, implicit-def $nzcv
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; CHECK: Bcc 8, %bb.4, implicit $nzcv
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; CHECK: bb.1.entry:
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; CHECK: successors: %bb.3(0x2aaaaaab), %bb.4(0x2aaaaaab), %bb.2(0x2aaaaaab)
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; CHECK: [[COPY2:%[0-9]+]]:gpr32 = COPY $wzr
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; CHECK: [[MOVaddrJT:%[0-9]+]]:gpr64 = MOVaddrJT target-flags(aarch64-page) %jump-table.0, target-flags(aarch64-pageoff, aarch64-nc) %jump-table.0
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; CHECK: early-clobber %18:gpr64, early-clobber %19:gpr64sp = JumpTableDest32 [[MOVaddrJT]], [[SUBREG_TO_REG]], %jump-table.0
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; CHECK: BR %18
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; CHECK: bb.2.sw.bb:
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; CHECK: successors: %bb.4(0x80000000)
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; CHECK: [[ADDWri:%[0-9]+]]:gpr32sp = nsw ADDWri [[COPY]], 42, 0
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; CHECK: B %bb.4
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; CHECK: bb.3.sw.bb1:
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; CHECK: successors: %bb.4(0x80000000)
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; CHECK: [[MOVi32imm:%[0-9]+]]:gpr32 = MOVi32imm 3
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; CHECK: [[MADDWrrr:%[0-9]+]]:gpr32 = nsw MADDWrrr [[COPY]], [[MOVi32imm]], $wzr
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; CHECK: bb.4.return:
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; CHECK: [[PHI:%[0-9]+]]:gpr32 = PHI [[MADDWrrr]], %bb.3, [[ADDWri]], %bb.2, [[COPY1]], %bb.0, [[COPY2]], %bb.1
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; CHECK: $w0 = COPY [[PHI]]
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; CHECK: RET_ReallyLR implicit $w0
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bb.1.entry:
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liveins: $w0
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%0:gpr(s32) = COPY $w0
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%4:gpr(s32) = G_CONSTANT i32 71
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%8:gpr(s32) = G_CONSTANT i32 3
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%10:gpr(s32) = G_CONSTANT i32 42
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%13:gpr(s32) = G_CONSTANT i32 0
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%1:gpr(s32) = G_CONSTANT i32 4
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%2:gpr(s32) = G_SUB %0, %1
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%3:gpr(s64) = G_ZEXT %2(s32)
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%5:gpr(s64) = G_ZEXT %4(s32)
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%14:gpr(s32) = G_ICMP intpred(ugt), %3(s64), %5
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%6:gpr(s1) = G_TRUNC %14(s32)
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G_BRCOND %6(s1), %bb.4
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bb.5.entry:
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successors: %bb.3, %bb.4, %bb.2
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%17:gpr(s32) = G_CONSTANT i32 0
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%7:gpr(p0) = G_JUMP_TABLE %jump-table.0
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G_BRJT %7(p0), %jump-table.0, %3(s64)
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bb.2.sw.bb:
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%16:gpr(s32) = G_CONSTANT i32 42
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%11:gpr(s32) = nsw G_ADD %0, %16
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G_BR %bb.4
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bb.3.sw.bb1:
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%15:gpr(s32) = G_CONSTANT i32 3
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%9:gpr(s32) = nsw G_MUL %0, %15
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bb.4.return:
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%12:gpr(s32) = G_PHI %9(s32), %bb.3, %11(s32), %bb.2, %13(s32), %bb.1, %17(s32), %bb.5
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$w0 = COPY %12(s32)
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RET_ReallyLR implicit $w0
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...
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