99 lines
3.0 KiB
Plaintext
99 lines
3.0 KiB
Plaintext
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -run-pass=aarch64-prelegalizer-combiner -verify-machineinstrs -mtriple aarch64-unknown-unknown %s -o - | FileCheck %s
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...
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---
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name: mul_to_shl
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alignment: 4
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tracksRegLiveness: true
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frameInfo:
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maxAlignment: 1
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machineFunctionInfo: {}
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body: |
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bb.0:
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liveins: $x0
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; CHECK-LABEL: name: mul_to_shl
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; CHECK: liveins: $x0
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; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x0
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; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 2
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; CHECK: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[COPY]], [[C]](s64)
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; CHECK: $x0 = COPY [[SHL]](s64)
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; CHECK: RET_ReallyLR implicit-def $x0
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%0:_(s64) = COPY $x0
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%1:_(s64) = G_CONSTANT i64 4
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%2:_(s64) = G_MUL %0, %1(s64)
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$x0 = COPY %2(s64)
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RET_ReallyLR implicit-def $x0
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...
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---
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name: mul_to_shl_16
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alignment: 4
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tracksRegLiveness: true
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frameInfo:
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maxAlignment: 1
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machineFunctionInfo: {}
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body: |
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bb.0:
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liveins: $x0
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; CHECK-LABEL: name: mul_to_shl_16
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; CHECK: liveins: $x0
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; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x0
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; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4
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; CHECK: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[COPY]], [[C]](s64)
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; CHECK: $x0 = COPY [[SHL]](s64)
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; CHECK: RET_ReallyLR implicit-def $x0
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%0:_(s64) = COPY $x0
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%1:_(s64) = G_CONSTANT i64 16
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%2:_(s64) = G_MUL %0, %1(s64)
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$x0 = COPY %2(s64)
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RET_ReallyLR implicit-def $x0
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...
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---
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name: mul_to_shl_vector_16
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alignment: 4
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tracksRegLiveness: true
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frameInfo:
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maxAlignment: 1
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machineFunctionInfo: {}
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body: |
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bb.0:
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liveins: $q0
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; Currently not implemented.
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; CHECK-LABEL: name: mul_to_shl_vector_16
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; CHECK: liveins: $q0
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; CHECK: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $q0
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; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
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; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32)
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; CHECK: [[MUL:%[0-9]+]]:_(<4 x s32>) = G_MUL [[COPY]], [[BUILD_VECTOR]]
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; CHECK: $q0 = COPY [[MUL]](<4 x s32>)
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; CHECK: RET_ReallyLR implicit-def $q0
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%0:_(<4 x s32>) = COPY $q0
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%1:_(s32) = G_CONSTANT i32 16
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%2:_(<4 x s32>) = G_BUILD_VECTOR %1(s32), %1(s32), %1(s32), %1(s32)
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%3:_(<4 x s32>) = G_MUL %0, %2(<4 x s32>)
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$q0 = COPY %3(<4 x s32>)
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RET_ReallyLR implicit-def $q0
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...
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---
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name: mul_to_shl_non_pow2
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alignment: 4
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tracksRegLiveness: true
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frameInfo:
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maxAlignment: 1
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machineFunctionInfo: {}
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body: |
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bb.0:
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liveins: $x0
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; CHECK-LABEL: name: mul_to_shl_non_pow2
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; CHECK: liveins: $x0
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; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x0
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; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 10
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; CHECK: [[MUL:%[0-9]+]]:_(s64) = G_MUL [[COPY]], [[C]]
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; CHECK: $x0 = COPY [[MUL]](s64)
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; CHECK: RET_ReallyLR implicit-def $x0
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%0:_(s64) = COPY $x0
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%1:_(s64) = G_CONSTANT i64 10
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%2:_(s64) = G_MUL %0, %1(s64)
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$x0 = COPY %2(s64)
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RET_ReallyLR implicit-def $x0
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...
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