503 lines
20 KiB
C++
503 lines
20 KiB
C++
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//===-- VEFrameLowering.cpp - VE Frame Information ------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the VE implementation of TargetFrameLowering class.
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//
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// On VE, stack frames are structured as follows:
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//
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// The stack grows downward.
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//
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// All of the individual frame areas on the frame below are optional, i.e. it's
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// possible to create a function so that the particular area isn't present
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// in the frame.
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//
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// At function entry, the "frame" looks as follows:
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//
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// | | Higher address
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// |----------------------------------------------|
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// | Parameter area for this function |
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// |----------------------------------------------|
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// | Register save area (RSA) for this function |
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// |----------------------------------------------|
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// | Return address for this function |
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// |----------------------------------------------|
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// | Frame pointer for this function |
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// |----------------------------------------------| <- sp
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// | | Lower address
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//
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// VE doesn't use on demand stack allocation, so user code generated by LLVM
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// needs to call VEOS to allocate stack frame. VE's ABI want to reduce the
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// number of VEOS calls, so ABI requires to allocate not only RSA (in general
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// CSR, callee saved register) area but also call frame at the prologue of
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// caller function.
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//
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// After the prologue has run, the frame has the following general structure.
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// Note that technically the last frame area (VLAs) doesn't get created until
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// in the main function body, after the prologue is run. However, it's depicted
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// here for completeness.
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//
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// | | Higher address
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// |----------------------------------------------|
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// | Parameter area for this function |
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// |----------------------------------------------|
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// | Register save area (RSA) for this function |
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// |----------------------------------------------|
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// | Return address for this function |
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// |----------------------------------------------|
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// | Frame pointer for this function |
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// |----------------------------------------------| <- fp(=old sp)
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// |.empty.space.to.make.part.below.aligned.in....|
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// |.case.it.needs.more.than.the.standard.16-byte.| (size of this area is
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// |.alignment....................................| unknown at compile time)
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// |----------------------------------------------|
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// | Local variables of fixed size including spill|
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// | slots |
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// |----------------------------------------------| <- bp(not defined by ABI,
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// |.variable-sized.local.variables.(VLAs)........| LLVM chooses SX17)
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// |..............................................| (size of this area is
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// |..............................................| unknown at compile time)
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// |----------------------------------------------| <- stack top (returned by
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// | Parameter area for callee | alloca)
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// |----------------------------------------------|
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// | Register save area (RSA) for callee |
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// |----------------------------------------------|
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// | Return address for callee |
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// |----------------------------------------------|
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// | Frame pointer for callee |
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// |----------------------------------------------| <- sp
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// | | Lower address
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//
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// To access the data in a frame, at-compile time, a constant offset must be
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// computable from one of the pointers (fp, bp, sp) to access it. The size
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// of the areas with a dotted background cannot be computed at compile-time
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// if they are present, making it required to have all three of fp, bp and
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// sp to be set up to be able to access all contents in the frame areas,
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// assuming all of the frame areas are non-empty.
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//
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// For most functions, some of the frame areas are empty. For those functions,
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// it may not be necessary to set up fp or bp:
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// * A base pointer is definitely needed when there are both VLAs and local
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// variables with more-than-default alignment requirements.
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// * A frame pointer is definitely needed when there are local variables with
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// more-than-default alignment requirements.
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//
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// In addition, VE ABI defines RSA frame, return address, and frame pointer
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// as follows:
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//
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// |----------------------------------------------| <- sp+176
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// | %s18...%s33 |
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// |----------------------------------------------| <- sp+48
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// | Linkage area register (%s17) |
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// |----------------------------------------------| <- sp+40
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// | Procedure linkage table register (%plt=%s16) |
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// |----------------------------------------------| <- sp+32
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// | Global offset table register (%got=%s15) |
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// |----------------------------------------------| <- sp+24
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// | Thread pointer register (%tp=%s14) |
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// |----------------------------------------------| <- sp+16
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// | Return address |
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// |----------------------------------------------| <- sp+8
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// | Frame pointer |
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// |----------------------------------------------| <- sp+0
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//
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// NOTE: This description is based on VE ABI and description in
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// AArch64FrameLowering.cpp. Thanks a lot.
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//===----------------------------------------------------------------------===//
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#include "VEFrameLowering.h"
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#include "VEInstrInfo.h"
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#include "VEMachineFunctionInfo.h"
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#include "VESubtarget.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/MachineModuleInfo.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/CodeGen/RegisterScavenging.h"
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#include "llvm/IR/DataLayout.h"
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#include "llvm/IR/Function.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Target/TargetOptions.h"
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#include "llvm/Support/MathExtras.h"
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using namespace llvm;
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VEFrameLowering::VEFrameLowering(const VESubtarget &ST)
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: TargetFrameLowering(TargetFrameLowering::StackGrowsDown, Align(16), 0,
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Align(16)),
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STI(ST) {}
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void VEFrameLowering::emitPrologueInsns(MachineFunction &MF,
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MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MBBI,
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uint64_t NumBytes,
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bool RequireFPUpdate) const {
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const VEMachineFunctionInfo *FuncInfo = MF.getInfo<VEMachineFunctionInfo>();
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DebugLoc DL;
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const VEInstrInfo &TII = *STI.getInstrInfo();
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// Insert following codes here as prologue
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//
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// st %fp, 0(, %sp) iff !isLeafProc
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// st %lr, 8(, %sp) iff !isLeafProc
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// st %got, 24(, %sp) iff hasGOT
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// st %plt, 32(, %sp) iff hasGOT
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// st %s17, 40(, %sp) iff hasBP
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if (!FuncInfo->isLeafProc()) {
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BuildMI(MBB, MBBI, DL, TII.get(VE::STrii))
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.addReg(VE::SX11)
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.addImm(0)
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.addImm(0)
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.addReg(VE::SX9);
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BuildMI(MBB, MBBI, DL, TII.get(VE::STrii))
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.addReg(VE::SX11)
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.addImm(0)
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.addImm(8)
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.addReg(VE::SX10);
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}
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if (hasGOT(MF)) {
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BuildMI(MBB, MBBI, DL, TII.get(VE::STrii))
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.addReg(VE::SX11)
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.addImm(0)
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.addImm(24)
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.addReg(VE::SX15);
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BuildMI(MBB, MBBI, DL, TII.get(VE::STrii))
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.addReg(VE::SX11)
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.addImm(0)
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.addImm(32)
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.addReg(VE::SX16);
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}
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if (hasBP(MF))
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BuildMI(MBB, MBBI, DL, TII.get(VE::STrii))
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.addReg(VE::SX11)
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.addImm(0)
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.addImm(40)
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.addReg(VE::SX17);
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}
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void VEFrameLowering::emitEpilogueInsns(MachineFunction &MF,
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MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MBBI,
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uint64_t NumBytes,
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bool RequireFPUpdate) const {
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const VEMachineFunctionInfo *FuncInfo = MF.getInfo<VEMachineFunctionInfo>();
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DebugLoc DL;
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const VEInstrInfo &TII = *STI.getInstrInfo();
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// Insert following codes here as epilogue
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//
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// ld %s17, 40(, %sp) iff hasBP
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// ld %plt, 32(, %sp) iff hasGOT
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// ld %got, 24(, %sp) iff hasGOT
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// ld %lr, 8(, %sp) iff !isLeafProc
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// ld %fp, 0(, %sp) iff !isLeafProc
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if (hasBP(MF))
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BuildMI(MBB, MBBI, DL, TII.get(VE::LDrii), VE::SX17)
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.addReg(VE::SX11)
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.addImm(0)
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.addImm(40);
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if (hasGOT(MF)) {
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BuildMI(MBB, MBBI, DL, TII.get(VE::LDrii), VE::SX16)
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.addReg(VE::SX11)
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.addImm(0)
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.addImm(32);
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BuildMI(MBB, MBBI, DL, TII.get(VE::LDrii), VE::SX15)
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.addReg(VE::SX11)
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.addImm(0)
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.addImm(24);
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}
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if (!FuncInfo->isLeafProc()) {
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BuildMI(MBB, MBBI, DL, TII.get(VE::LDrii), VE::SX10)
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.addReg(VE::SX11)
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.addImm(0)
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.addImm(8);
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BuildMI(MBB, MBBI, DL, TII.get(VE::LDrii), VE::SX9)
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.addReg(VE::SX11)
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.addImm(0)
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.addImm(0);
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}
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}
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void VEFrameLowering::emitSPAdjustment(MachineFunction &MF,
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MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MBBI,
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int64_t NumBytes,
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MaybeAlign MaybeAlign) const {
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DebugLoc DL;
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const VEInstrInfo &TII = *STI.getInstrInfo();
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if (NumBytes == 0) {
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// Nothing to do here.
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} else if (isInt<7>(NumBytes)) {
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// adds.l %s11, NumBytes@lo, %s11
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BuildMI(MBB, MBBI, DL, TII.get(VE::ADDSLri), VE::SX11)
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.addReg(VE::SX11)
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.addImm(NumBytes);
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} else if (isInt<32>(NumBytes)) {
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// lea %s11, NumBytes@lo(, %s11)
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BuildMI(MBB, MBBI, DL, TII.get(VE::LEArii), VE::SX11)
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.addReg(VE::SX11)
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.addImm(0)
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.addImm(Lo_32(NumBytes));
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} else {
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// Emit following codes. This clobbers SX13 which we always know is
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// available here.
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// lea %s13, NumBytes@lo
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// and %s13, %s13, (32)0
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// lea.sl %sp, NumBytes@hi(%s13, %sp)
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BuildMI(MBB, MBBI, DL, TII.get(VE::LEAzii), VE::SX13)
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.addImm(0)
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.addImm(0)
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.addImm(Lo_32(NumBytes));
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BuildMI(MBB, MBBI, DL, TII.get(VE::ANDrm), VE::SX13)
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.addReg(VE::SX13)
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.addImm(M0(32));
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BuildMI(MBB, MBBI, DL, TII.get(VE::LEASLrri), VE::SX11)
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.addReg(VE::SX11)
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.addReg(VE::SX13)
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.addImm(Hi_32(NumBytes));
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}
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if (MaybeAlign) {
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// and %sp, %sp, Align-1
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BuildMI(MBB, MBBI, DL, TII.get(VE::ANDrm), VE::SX11)
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.addReg(VE::SX11)
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.addImm(M1(64 - Log2_64(MaybeAlign.valueOrOne().value())));
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}
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}
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void VEFrameLowering::emitSPExtend(MachineFunction &MF, MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MBBI) const {
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DebugLoc DL;
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const VEInstrInfo &TII = *STI.getInstrInfo();
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// Emit following codes. It is not possible to insert multiple
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// BasicBlocks in PEI pass, so we emit two pseudo instructions here.
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//
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// EXTEND_STACK // pseudo instrcution
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// EXTEND_STACK_GUARD // pseudo instrcution
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//
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// EXTEND_STACK pseudo will be converted by ExpandPostRA pass into
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// following instructions with multiple basic blocks later.
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//
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// thisBB:
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// brge.l.t %sp, %sl, sinkBB
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// syscallBB:
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// ld %s61, 0x18(, %tp) // load param area
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// or %s62, 0, %s0 // spill the value of %s0
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// lea %s63, 0x13b // syscall # of grow
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// shm.l %s63, 0x0(%s61) // store syscall # at addr:0
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// shm.l %sl, 0x8(%s61) // store old limit at addr:8
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// shm.l %sp, 0x10(%s61) // store new limit at addr:16
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// monc // call monitor
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// or %s0, 0, %s62 // restore the value of %s0
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// sinkBB:
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//
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// EXTEND_STACK_GUARD pseudo will be simply eliminated by ExpandPostRA
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// pass. This pseudo is required to be at the next of EXTEND_STACK
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// pseudo in order to protect iteration loop in ExpandPostRA.
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BuildMI(MBB, MBBI, DL, TII.get(VE::EXTEND_STACK));
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BuildMI(MBB, MBBI, DL, TII.get(VE::EXTEND_STACK_GUARD));
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}
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void VEFrameLowering::emitPrologue(MachineFunction &MF,
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MachineBasicBlock &MBB) const {
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const VEMachineFunctionInfo *FuncInfo = MF.getInfo<VEMachineFunctionInfo>();
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assert(&MF.front() == &MBB && "Shrink-wrapping not yet supported");
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MachineFrameInfo &MFI = MF.getFrameInfo();
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const VEInstrInfo &TII = *STI.getInstrInfo();
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const VERegisterInfo &RegInfo = *STI.getRegisterInfo();
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MachineBasicBlock::iterator MBBI = MBB.begin();
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bool NeedsStackRealignment = RegInfo.needsStackRealignment(MF);
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// Debug location must be unknown since the first debug location is used
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// to determine the end of the prologue.
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DebugLoc DL;
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// FIXME: unfortunately, returning false from canRealignStack
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// actually just causes needsStackRealignment to return false,
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// rather than reporting an error, as would be sensible. This is
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// poor, but fixing that bogosity is going to be a large project.
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// For now, just see if it's lied, and report an error here.
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if (!NeedsStackRealignment && MFI.getMaxAlign() > getStackAlign())
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report_fatal_error("Function \"" + Twine(MF.getName()) +
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"\" required "
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"stack re-alignment, but LLVM couldn't handle it "
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"(probably because it has a dynamic alloca).");
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// Get the number of bytes to allocate from the FrameInfo.
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// This number of bytes is already aligned to ABI stack alignment.
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uint64_t NumBytes = MFI.getStackSize();
|
||
|
|
|
||
|
|
// Adjust stack size if this function is not a leaf function since the
|
||
|
|
// VE ABI requires a reserved area at the top of stack as described in
|
||
|
|
// VEFrameLowering.cpp.
|
||
|
|
if (!FuncInfo->isLeafProc()) {
|
||
|
|
// NOTE: The number is aligned to ABI stack alignment after adjustment.
|
||
|
|
NumBytes = STI.getAdjustedFrameSize(NumBytes);
|
||
|
|
}
|
||
|
|
|
||
|
|
// Finally, ensure that the size is sufficiently aligned for the
|
||
|
|
// data on the stack.
|
||
|
|
NumBytes = alignTo(NumBytes, MFI.getMaxAlign());
|
||
|
|
|
||
|
|
// Update stack size with corrected value.
|
||
|
|
MFI.setStackSize(NumBytes);
|
||
|
|
|
||
|
|
// Emit Prologue instructions to save multiple registers.
|
||
|
|
emitPrologueInsns(MF, MBB, MBBI, NumBytes, true);
|
||
|
|
|
||
|
|
// Emit instructions to save SP in FP as follows if this is not a leaf
|
||
|
|
// function:
|
||
|
|
// or %fp, 0, %sp
|
||
|
|
if (!FuncInfo->isLeafProc())
|
||
|
|
BuildMI(MBB, MBBI, DL, TII.get(VE::ORri), VE::SX9)
|
||
|
|
.addReg(VE::SX11)
|
||
|
|
.addImm(0);
|
||
|
|
|
||
|
|
// Emit stack adjust instructions
|
||
|
|
MaybeAlign RuntimeAlign =
|
||
|
|
NeedsStackRealignment ? MaybeAlign(MFI.getMaxAlign()) : None;
|
||
|
|
assert((RuntimeAlign == None || !FuncInfo->isLeafProc()) &&
|
||
|
|
"SP has to be saved in order to align variable sized stack object!");
|
||
|
|
emitSPAdjustment(MF, MBB, MBBI, -(int64_t)NumBytes, RuntimeAlign);
|
||
|
|
|
||
|
|
if (hasBP(MF)) {
|
||
|
|
// Copy SP to BP.
|
||
|
|
BuildMI(MBB, MBBI, DL, TII.get(VE::ORri), VE::SX17)
|
||
|
|
.addReg(VE::SX11)
|
||
|
|
.addImm(0);
|
||
|
|
}
|
||
|
|
|
||
|
|
// Emit stack extend instructions
|
||
|
|
if (NumBytes != 0)
|
||
|
|
emitSPExtend(MF, MBB, MBBI);
|
||
|
|
}
|
||
|
|
|
||
|
|
MachineBasicBlock::iterator VEFrameLowering::eliminateCallFramePseudoInstr(
|
||
|
|
MachineFunction &MF, MachineBasicBlock &MBB,
|
||
|
|
MachineBasicBlock::iterator I) const {
|
||
|
|
if (!hasReservedCallFrame(MF)) {
|
||
|
|
MachineInstr &MI = *I;
|
||
|
|
int64_t Size = MI.getOperand(0).getImm();
|
||
|
|
if (MI.getOpcode() == VE::ADJCALLSTACKDOWN)
|
||
|
|
Size = -Size;
|
||
|
|
|
||
|
|
if (Size)
|
||
|
|
emitSPAdjustment(MF, MBB, I, Size);
|
||
|
|
}
|
||
|
|
return MBB.erase(I);
|
||
|
|
}
|
||
|
|
|
||
|
|
void VEFrameLowering::emitEpilogue(MachineFunction &MF,
|
||
|
|
MachineBasicBlock &MBB) const {
|
||
|
|
const VEMachineFunctionInfo *FuncInfo = MF.getInfo<VEMachineFunctionInfo>();
|
||
|
|
DebugLoc DL;
|
||
|
|
MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr();
|
||
|
|
MachineFrameInfo &MFI = MF.getFrameInfo();
|
||
|
|
const VEInstrInfo &TII = *STI.getInstrInfo();
|
||
|
|
|
||
|
|
uint64_t NumBytes = MFI.getStackSize();
|
||
|
|
|
||
|
|
// Emit instructions to retrieve original SP.
|
||
|
|
if (!FuncInfo->isLeafProc()) {
|
||
|
|
// If SP is saved in FP, retrieve it as follows:
|
||
|
|
// or %sp, 0, %fp iff !isLeafProc
|
||
|
|
BuildMI(MBB, MBBI, DL, TII.get(VE::ORri), VE::SX11)
|
||
|
|
.addReg(VE::SX9)
|
||
|
|
.addImm(0);
|
||
|
|
} else {
|
||
|
|
// Emit stack adjust instructions.
|
||
|
|
emitSPAdjustment(MF, MBB, MBBI, NumBytes, None);
|
||
|
|
}
|
||
|
|
|
||
|
|
// Emit Epilogue instructions to restore multiple registers.
|
||
|
|
emitEpilogueInsns(MF, MBB, MBBI, NumBytes, true);
|
||
|
|
}
|
||
|
|
|
||
|
|
// hasFP - Return true if the specified function should have a dedicated frame
|
||
|
|
// pointer register. This is true if the function has variable sized allocas
|
||
|
|
// or if frame pointer elimination is disabled.
|
||
|
|
bool VEFrameLowering::hasFP(const MachineFunction &MF) const {
|
||
|
|
const TargetRegisterInfo *RegInfo = MF.getSubtarget().getRegisterInfo();
|
||
|
|
|
||
|
|
const MachineFrameInfo &MFI = MF.getFrameInfo();
|
||
|
|
return MF.getTarget().Options.DisableFramePointerElim(MF) ||
|
||
|
|
RegInfo->needsStackRealignment(MF) || MFI.hasVarSizedObjects() ||
|
||
|
|
MFI.isFrameAddressTaken();
|
||
|
|
}
|
||
|
|
|
||
|
|
bool VEFrameLowering::hasBP(const MachineFunction &MF) const {
|
||
|
|
const MachineFrameInfo &MFI = MF.getFrameInfo();
|
||
|
|
const TargetRegisterInfo *TRI = STI.getRegisterInfo();
|
||
|
|
|
||
|
|
return MFI.hasVarSizedObjects() && TRI->needsStackRealignment(MF);
|
||
|
|
}
|
||
|
|
|
||
|
|
bool VEFrameLowering::hasGOT(const MachineFunction &MF) const {
|
||
|
|
const VEMachineFunctionInfo *FuncInfo = MF.getInfo<VEMachineFunctionInfo>();
|
||
|
|
|
||
|
|
// If a global base register is assigned (!= 0), GOT is used.
|
||
|
|
return FuncInfo->getGlobalBaseReg() != 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
StackOffset VEFrameLowering::getFrameIndexReference(const MachineFunction &MF,
|
||
|
|
int FI,
|
||
|
|
Register &FrameReg) const {
|
||
|
|
const MachineFrameInfo &MFI = MF.getFrameInfo();
|
||
|
|
const VERegisterInfo *RegInfo = STI.getRegisterInfo();
|
||
|
|
bool isFixed = MFI.isFixedObjectIndex(FI);
|
||
|
|
|
||
|
|
int64_t FrameOffset = MF.getFrameInfo().getObjectOffset(FI);
|
||
|
|
|
||
|
|
if (!hasFP(MF)) {
|
||
|
|
// If FP is not used, frame indexies are based on a %sp regiter.
|
||
|
|
FrameReg = VE::SX11; // %sp
|
||
|
|
return StackOffset::getFixed(FrameOffset +
|
||
|
|
MF.getFrameInfo().getStackSize());
|
||
|
|
}
|
||
|
|
if (RegInfo->needsStackRealignment(MF) && !isFixed) {
|
||
|
|
// If data on stack require realignemnt, frame indexies are based on a %sp
|
||
|
|
// or %s17 (bp) register. If there is a variable sized object, bp is used.
|
||
|
|
if (hasBP(MF))
|
||
|
|
FrameReg = VE::SX17; // %bp
|
||
|
|
else
|
||
|
|
FrameReg = VE::SX11; // %sp
|
||
|
|
return StackOffset::getFixed(FrameOffset +
|
||
|
|
MF.getFrameInfo().getStackSize());
|
||
|
|
}
|
||
|
|
// Use %fp by default.
|
||
|
|
FrameReg = RegInfo->getFrameRegister(MF);
|
||
|
|
return StackOffset::getFixed(FrameOffset);
|
||
|
|
}
|
||
|
|
|
||
|
|
bool VEFrameLowering::isLeafProc(MachineFunction &MF) const {
|
||
|
|
|
||
|
|
MachineRegisterInfo &MRI = MF.getRegInfo();
|
||
|
|
MachineFrameInfo &MFI = MF.getFrameInfo();
|
||
|
|
|
||
|
|
return !MFI.hasCalls() // No calls
|
||
|
|
&& !MRI.isPhysRegUsed(VE::SX18) // Registers within limits
|
||
|
|
// (s18 is first CSR)
|
||
|
|
&& !MRI.isPhysRegUsed(VE::SX11) // %sp un-used
|
||
|
|
&& !hasFP(MF); // Don't need %fp
|
||
|
|
}
|
||
|
|
|
||
|
|
void VEFrameLowering::determineCalleeSaves(MachineFunction &MF,
|
||
|
|
BitVector &SavedRegs,
|
||
|
|
RegScavenger *RS) const {
|
||
|
|
TargetFrameLowering::determineCalleeSaves(MF, SavedRegs, RS);
|
||
|
|
|
||
|
|
// Functions having BP need to emit prologue and epilogue to allocate local
|
||
|
|
// buffer on the stack even if the function is a leaf function.
|
||
|
|
if (isLeafProc(MF) && !hasBP(MF)) {
|
||
|
|
VEMachineFunctionInfo *FuncInfo = MF.getInfo<VEMachineFunctionInfo>();
|
||
|
|
FuncInfo->setLeafProc(true);
|
||
|
|
}
|
||
|
|
}
|