117 lines
5.0 KiB
TableGen
117 lines
5.0 KiB
TableGen
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//===- NVPTX.td - Describe the NVPTX Target Machine -----------*- tblgen -*-==//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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// This is the top level entry point for the NVPTX target.
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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// Target-independent interfaces
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//===----------------------------------------------------------------------===//
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include "llvm/Target/Target.td"
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include "NVPTXRegisterInfo.td"
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include "NVPTXInstrInfo.td"
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//===----------------------------------------------------------------------===//
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// Subtarget Features.
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// - We use the SM version number instead of explicit feature table.
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// - Need at least one feature to avoid generating zero sized array by
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// TableGen in NVPTXGenSubtarget.inc.
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//===----------------------------------------------------------------------===//
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// SM Versions
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def SM20 : SubtargetFeature<"sm_20", "SmVersion", "20",
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"Target SM 2.0">;
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def SM21 : SubtargetFeature<"sm_21", "SmVersion", "21",
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"Target SM 2.1">;
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def SM30 : SubtargetFeature<"sm_30", "SmVersion", "30",
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"Target SM 3.0">;
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def SM32 : SubtargetFeature<"sm_32", "SmVersion", "32",
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"Target SM 3.2">;
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def SM35 : SubtargetFeature<"sm_35", "SmVersion", "35",
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"Target SM 3.5">;
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def SM37 : SubtargetFeature<"sm_37", "SmVersion", "37",
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"Target SM 3.7">;
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def SM50 : SubtargetFeature<"sm_50", "SmVersion", "50",
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"Target SM 5.0">;
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def SM52 : SubtargetFeature<"sm_52", "SmVersion", "52",
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"Target SM 5.2">;
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def SM53 : SubtargetFeature<"sm_53", "SmVersion", "53",
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"Target SM 5.3">;
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def SM60 : SubtargetFeature<"sm_60", "SmVersion", "60",
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"Target SM 6.0">;
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def SM61 : SubtargetFeature<"sm_61", "SmVersion", "61",
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"Target SM 6.1">;
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def SM62 : SubtargetFeature<"sm_62", "SmVersion", "62",
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"Target SM 6.2">;
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def SM70 : SubtargetFeature<"sm_70", "SmVersion", "70",
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"Target SM 7.0">;
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def SM72 : SubtargetFeature<"sm_72", "SmVersion", "72",
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"Target SM 7.2">;
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def SM75 : SubtargetFeature<"sm_75", "SmVersion", "75",
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"Target SM 7.5">;
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def SM80 : SubtargetFeature<"sm_80", "SmVersion", "80",
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"Target SM 8.0">;
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// PTX Versions
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def PTX32 : SubtargetFeature<"ptx32", "PTXVersion", "32",
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"Use PTX version 3.2">;
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def PTX40 : SubtargetFeature<"ptx40", "PTXVersion", "40",
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"Use PTX version 4.0">;
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def PTX41 : SubtargetFeature<"ptx41", "PTXVersion", "41",
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"Use PTX version 4.1">;
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def PTX42 : SubtargetFeature<"ptx42", "PTXVersion", "42",
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"Use PTX version 4.2">;
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def PTX43 : SubtargetFeature<"ptx43", "PTXVersion", "43",
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"Use PTX version 4.3">;
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def PTX50 : SubtargetFeature<"ptx50", "PTXVersion", "50",
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"Use PTX version 5.0">;
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def PTX60 : SubtargetFeature<"ptx60", "PTXVersion", "60",
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"Use PTX version 6.0">;
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def PTX61 : SubtargetFeature<"ptx61", "PTXVersion", "61",
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"Use PTX version 6.1">;
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def PTX63 : SubtargetFeature<"ptx63", "PTXVersion", "63",
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"Use PTX version 6.3">;
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def PTX64 : SubtargetFeature<"ptx64", "PTXVersion", "64",
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"Use PTX version 6.4">;
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def PTX65 : SubtargetFeature<"ptx65", "PTXVersion", "65",
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"Use PTX version 6.5">;
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def PTX70 : SubtargetFeature<"ptx70", "PTXVersion", "70",
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"Use PTX version 7.0">;
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//===----------------------------------------------------------------------===//
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// NVPTX supported processors.
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//===----------------------------------------------------------------------===//
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class Proc<string Name, list<SubtargetFeature> Features>
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: Processor<Name, NoItineraries, Features>;
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def : Proc<"sm_20", [SM20]>;
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def : Proc<"sm_21", [SM21]>;
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def : Proc<"sm_30", [SM30]>;
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def : Proc<"sm_32", [SM32, PTX40]>;
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def : Proc<"sm_35", [SM35]>;
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def : Proc<"sm_37", [SM37, PTX41]>;
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def : Proc<"sm_50", [SM50, PTX40]>;
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def : Proc<"sm_52", [SM52, PTX41]>;
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def : Proc<"sm_53", [SM53, PTX42]>;
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def : Proc<"sm_60", [SM60, PTX50]>;
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def : Proc<"sm_61", [SM61, PTX50]>;
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def : Proc<"sm_62", [SM62, PTX50]>;
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def : Proc<"sm_70", [SM70, PTX60]>;
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def : Proc<"sm_72", [SM72, PTX61]>;
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def : Proc<"sm_75", [SM75, PTX63]>;
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def : Proc<"sm_80", [SM80, PTX70]>;
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def NVPTXInstrInfo : InstrInfo {
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}
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def NVPTX : Target {
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let InstructionSet = NVPTXInstrInfo;
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}
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