79 lines
3.0 KiB
C++
79 lines
3.0 KiB
C++
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//===-- AMDGPUMachineFunctionInfo.cpp ---------------------------------------=//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "AMDGPUMachineFunction.h"
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#include "AMDGPUPerfHintAnalysis.h"
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#include "AMDGPUSubtarget.h"
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#include "llvm/CodeGen/MachineModuleInfo.h"
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#include "llvm/Target/TargetMachine.h"
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using namespace llvm;
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AMDGPUMachineFunction::AMDGPUMachineFunction(const MachineFunction &MF)
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: MachineFunctionInfo(), Mode(MF.getFunction()),
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IsEntryFunction(
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AMDGPU::isEntryFunctionCC(MF.getFunction().getCallingConv())),
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IsModuleEntryFunction(
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AMDGPU::isModuleEntryFunctionCC(MF.getFunction().getCallingConv())),
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NoSignedZerosFPMath(MF.getTarget().Options.NoSignedZerosFPMath) {
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const AMDGPUSubtarget &ST = AMDGPUSubtarget::get(MF);
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// FIXME: Should initialize KernArgSize based on ExplicitKernelArgOffset,
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// except reserved size is not correctly aligned.
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const Function &F = MF.getFunction();
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Attribute MemBoundAttr = F.getFnAttribute("amdgpu-memory-bound");
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MemoryBound = MemBoundAttr.isStringAttribute() &&
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MemBoundAttr.getValueAsString() == "true";
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Attribute WaveLimitAttr = F.getFnAttribute("amdgpu-wave-limiter");
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WaveLimiter = WaveLimitAttr.isStringAttribute() &&
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WaveLimitAttr.getValueAsString() == "true";
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CallingConv::ID CC = F.getCallingConv();
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if (CC == CallingConv::AMDGPU_KERNEL || CC == CallingConv::SPIR_KERNEL)
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ExplicitKernArgSize = ST.getExplicitKernArgSize(F, MaxKernArgAlign);
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}
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unsigned AMDGPUMachineFunction::allocateLDSGlobal(const DataLayout &DL,
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const GlobalVariable &GV) {
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auto Entry = LocalMemoryObjects.insert(std::make_pair(&GV, 0));
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if (!Entry.second)
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return Entry.first->second;
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Align Alignment =
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DL.getValueOrABITypeAlignment(GV.getAlign(), GV.getValueType());
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/// TODO: We should sort these to minimize wasted space due to alignment
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/// padding. Currently the padding is decided by the first encountered use
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/// during lowering.
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unsigned Offset = StaticLDSSize = alignTo(StaticLDSSize, Alignment);
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Entry.first->second = Offset;
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StaticLDSSize += DL.getTypeAllocSize(GV.getValueType());
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// Update the LDS size considering the padding to align the dynamic shared
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// memory.
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LDSSize = alignTo(StaticLDSSize, DynLDSAlign);
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return Offset;
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}
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void AMDGPUMachineFunction::setDynLDSAlign(const DataLayout &DL,
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const GlobalVariable &GV) {
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assert(DL.getTypeAllocSize(GV.getValueType()).isZero());
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Align Alignment =
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DL.getValueOrABITypeAlignment(GV.getAlign(), GV.getValueType());
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if (Alignment <= DynLDSAlign)
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return;
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LDSSize = alignTo(StaticLDSSize, Alignment);
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DynLDSAlign = Alignment;
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}
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