416 lines
15 KiB
C++
416 lines
15 KiB
C++
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//===-- AArch64MachObjectWriter.cpp - ARM Mach Object Writer --------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "MCTargetDesc/AArch64FixupKinds.h"
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#include "MCTargetDesc/AArch64MCTargetDesc.h"
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#include "llvm/ADT/Twine.h"
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#include "llvm/BinaryFormat/MachO.h"
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#include "llvm/MC/MCAsmInfo.h"
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#include "llvm/MC/MCAsmLayout.h"
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#include "llvm/MC/MCAssembler.h"
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#include "llvm/MC/MCContext.h"
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#include "llvm/MC/MCExpr.h"
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#include "llvm/MC/MCFixup.h"
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#include "llvm/MC/MCFragment.h"
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#include "llvm/MC/MCMachObjectWriter.h"
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#include "llvm/MC/MCSection.h"
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#include "llvm/MC/MCSectionMachO.h"
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#include "llvm/MC/MCSymbol.h"
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#include "llvm/MC/MCValue.h"
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#include "llvm/Support/Casting.h"
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#include "llvm/Support/MathExtras.h"
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#include <cassert>
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#include <cstdint>
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using namespace llvm;
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namespace {
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class AArch64MachObjectWriter : public MCMachObjectTargetWriter {
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bool getAArch64FixupKindMachOInfo(const MCFixup &Fixup, unsigned &RelocType,
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const MCSymbolRefExpr *Sym,
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unsigned &Log2Size, const MCAssembler &Asm);
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public:
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AArch64MachObjectWriter(uint32_t CPUType, uint32_t CPUSubtype, bool IsILP32)
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: MCMachObjectTargetWriter(!IsILP32 /* is64Bit */, CPUType, CPUSubtype) {}
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void recordRelocation(MachObjectWriter *Writer, MCAssembler &Asm,
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const MCAsmLayout &Layout, const MCFragment *Fragment,
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const MCFixup &Fixup, MCValue Target,
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uint64_t &FixedValue) override;
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};
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} // end anonymous namespace
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bool AArch64MachObjectWriter::getAArch64FixupKindMachOInfo(
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const MCFixup &Fixup, unsigned &RelocType, const MCSymbolRefExpr *Sym,
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unsigned &Log2Size, const MCAssembler &Asm) {
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RelocType = unsigned(MachO::ARM64_RELOC_UNSIGNED);
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Log2Size = ~0U;
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switch (Fixup.getTargetKind()) {
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default:
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return false;
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case FK_Data_1:
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Log2Size = Log2_32(1);
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return true;
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case FK_Data_2:
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Log2Size = Log2_32(2);
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return true;
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case FK_Data_4:
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Log2Size = Log2_32(4);
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if (Sym->getKind() == MCSymbolRefExpr::VK_GOT)
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RelocType = unsigned(MachO::ARM64_RELOC_POINTER_TO_GOT);
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return true;
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case FK_Data_8:
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Log2Size = Log2_32(8);
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if (Sym->getKind() == MCSymbolRefExpr::VK_GOT)
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RelocType = unsigned(MachO::ARM64_RELOC_POINTER_TO_GOT);
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return true;
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case AArch64::fixup_aarch64_add_imm12:
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case AArch64::fixup_aarch64_ldst_imm12_scale1:
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case AArch64::fixup_aarch64_ldst_imm12_scale2:
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case AArch64::fixup_aarch64_ldst_imm12_scale4:
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case AArch64::fixup_aarch64_ldst_imm12_scale8:
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case AArch64::fixup_aarch64_ldst_imm12_scale16:
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Log2Size = Log2_32(4);
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switch (Sym->getKind()) {
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default:
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return false;
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case MCSymbolRefExpr::VK_PAGEOFF:
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RelocType = unsigned(MachO::ARM64_RELOC_PAGEOFF12);
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return true;
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case MCSymbolRefExpr::VK_GOTPAGEOFF:
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RelocType = unsigned(MachO::ARM64_RELOC_GOT_LOAD_PAGEOFF12);
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return true;
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case MCSymbolRefExpr::VK_TLVPPAGEOFF:
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RelocType = unsigned(MachO::ARM64_RELOC_TLVP_LOAD_PAGEOFF12);
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return true;
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}
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case AArch64::fixup_aarch64_pcrel_adrp_imm21:
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Log2Size = Log2_32(4);
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// This encompasses the relocation for the whole 21-bit value.
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switch (Sym->getKind()) {
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default:
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Asm.getContext().reportError(Fixup.getLoc(),
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"ADR/ADRP relocations must be GOT relative");
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return false;
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case MCSymbolRefExpr::VK_PAGE:
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RelocType = unsigned(MachO::ARM64_RELOC_PAGE21);
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return true;
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case MCSymbolRefExpr::VK_GOTPAGE:
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RelocType = unsigned(MachO::ARM64_RELOC_GOT_LOAD_PAGE21);
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return true;
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case MCSymbolRefExpr::VK_TLVPPAGE:
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RelocType = unsigned(MachO::ARM64_RELOC_TLVP_LOAD_PAGE21);
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return true;
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}
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return true;
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case AArch64::fixup_aarch64_pcrel_branch26:
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case AArch64::fixup_aarch64_pcrel_call26:
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Log2Size = Log2_32(4);
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RelocType = unsigned(MachO::ARM64_RELOC_BRANCH26);
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return true;
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}
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}
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static bool canUseLocalRelocation(const MCSectionMachO &Section,
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const MCSymbol &Symbol, unsigned Log2Size) {
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// Debug info sections can use local relocations.
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if (Section.hasAttribute(MachO::S_ATTR_DEBUG))
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return true;
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// Otherwise, only pointer sized relocations are supported.
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if (Log2Size != 3)
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return false;
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// But only if they don't point to a few forbidden sections.
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if (!Symbol.isInSection())
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return true;
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const MCSectionMachO &RefSec = cast<MCSectionMachO>(Symbol.getSection());
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if (RefSec.getType() == MachO::S_CSTRING_LITERALS)
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return false;
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if (RefSec.getSegmentName() == "__DATA" &&
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RefSec.getName() == "__objc_classrefs")
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return false;
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// FIXME: ld64 currently handles internal pointer-sized relocations
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// incorrectly (applying the addend twice). We should be able to return true
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// unconditionally by this point when that's fixed.
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return false;
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}
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void AArch64MachObjectWriter::recordRelocation(
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MachObjectWriter *Writer, MCAssembler &Asm, const MCAsmLayout &Layout,
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const MCFragment *Fragment, const MCFixup &Fixup, MCValue Target,
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uint64_t &FixedValue) {
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unsigned IsPCRel = Writer->isFixupKindPCRel(Asm, Fixup.getKind());
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// See <reloc.h>.
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uint32_t FixupOffset = Layout.getFragmentOffset(Fragment);
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unsigned Log2Size = 0;
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int64_t Value = 0;
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unsigned Index = 0;
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unsigned Type = 0;
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unsigned Kind = Fixup.getKind();
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const MCSymbol *RelSymbol = nullptr;
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FixupOffset += Fixup.getOffset();
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// AArch64 pcrel relocation addends do not include the section offset.
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if (IsPCRel)
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FixedValue += FixupOffset;
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// ADRP fixups use relocations for the whole symbol value and only
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// put the addend in the instruction itself. Clear out any value the
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// generic code figured out from the sybmol definition.
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if (Kind == AArch64::fixup_aarch64_pcrel_adrp_imm21)
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FixedValue = 0;
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// imm19 relocations are for conditional branches, which require
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// assembler local symbols. If we got here, that's not what we have,
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// so complain loudly.
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if (Kind == AArch64::fixup_aarch64_pcrel_branch19) {
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Asm.getContext().reportError(Fixup.getLoc(),
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"conditional branch requires assembler-local"
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" label. '" +
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Target.getSymA()->getSymbol().getName() +
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"' is external.");
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return;
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}
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// 14-bit branch relocations should only target internal labels, and so
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// should never get here.
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if (Kind == AArch64::fixup_aarch64_pcrel_branch14) {
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Asm.getContext().reportError(Fixup.getLoc(),
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"Invalid relocation on conditional branch!");
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return;
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}
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if (!getAArch64FixupKindMachOInfo(Fixup, Type, Target.getSymA(), Log2Size,
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Asm)) {
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Asm.getContext().reportError(Fixup.getLoc(), "unknown AArch64 fixup kind!");
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return;
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}
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Value = Target.getConstant();
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if (Target.isAbsolute()) { // constant
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// FIXME: Should this always be extern?
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// SymbolNum of 0 indicates the absolute section.
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Type = MachO::ARM64_RELOC_UNSIGNED;
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if (IsPCRel) {
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Asm.getContext().reportError(Fixup.getLoc(),
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"PC relative absolute relocation!");
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return;
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// FIXME: x86_64 sets the type to a branch reloc here. Should we do
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// something similar?
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}
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} else if (Target.getSymB()) { // A - B + constant
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const MCSymbol *A = &Target.getSymA()->getSymbol();
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const MCSymbol *A_Base = Asm.getAtom(*A);
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const MCSymbol *B = &Target.getSymB()->getSymbol();
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const MCSymbol *B_Base = Asm.getAtom(*B);
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// Check for "_foo@got - .", which comes through here as:
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// Ltmp0:
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// ... _foo@got - Ltmp0
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if (Target.getSymA()->getKind() == MCSymbolRefExpr::VK_GOT &&
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Target.getSymB()->getKind() == MCSymbolRefExpr::VK_None &&
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Layout.getSymbolOffset(*B) ==
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Layout.getFragmentOffset(Fragment) + Fixup.getOffset()) {
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// SymB is the PC, so use a PC-rel pointer-to-GOT relocation.
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Type = MachO::ARM64_RELOC_POINTER_TO_GOT;
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IsPCRel = 1;
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MachO::any_relocation_info MRE;
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MRE.r_word0 = FixupOffset;
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MRE.r_word1 = (IsPCRel << 24) | (Log2Size << 25) | (Type << 28);
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Writer->addRelocation(A_Base, Fragment->getParent(), MRE);
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return;
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} else if (Target.getSymA()->getKind() != MCSymbolRefExpr::VK_None ||
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Target.getSymB()->getKind() != MCSymbolRefExpr::VK_None) {
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// Otherwise, neither symbol can be modified.
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Asm.getContext().reportError(Fixup.getLoc(),
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"unsupported relocation of modified symbol");
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return;
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}
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// We don't support PCrel relocations of differences.
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if (IsPCRel) {
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Asm.getContext().reportError(Fixup.getLoc(),
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"unsupported pc-relative relocation of "
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"difference");
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return;
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}
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// AArch64 always uses external relocations. If there is no symbol to use as
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// a base address (a local symbol with no preceding non-local symbol),
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// error out.
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//
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// FIXME: We should probably just synthesize an external symbol and use
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// that.
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if (!A_Base) {
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Asm.getContext().reportError(
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Fixup.getLoc(),
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"unsupported relocation of local symbol '" + A->getName() +
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"'. Must have non-local symbol earlier in section.");
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return;
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}
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if (!B_Base) {
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Asm.getContext().reportError(
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Fixup.getLoc(),
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"unsupported relocation of local symbol '" + B->getName() +
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"'. Must have non-local symbol earlier in section.");
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return;
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}
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if (A_Base == B_Base && A_Base) {
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Asm.getContext().reportError(
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Fixup.getLoc(), "unsupported relocation with identical base");
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return;
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}
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Value += (!A->getFragment() ? 0 : Writer->getSymbolAddress(*A, Layout)) -
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(!A_Base || !A_Base->getFragment() ? 0 : Writer->getSymbolAddress(
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*A_Base, Layout));
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Value -= (!B->getFragment() ? 0 : Writer->getSymbolAddress(*B, Layout)) -
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(!B_Base || !B_Base->getFragment() ? 0 : Writer->getSymbolAddress(
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*B_Base, Layout));
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Type = MachO::ARM64_RELOC_UNSIGNED;
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MachO::any_relocation_info MRE;
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MRE.r_word0 = FixupOffset;
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MRE.r_word1 = (IsPCRel << 24) | (Log2Size << 25) | (Type << 28);
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Writer->addRelocation(A_Base, Fragment->getParent(), MRE);
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RelSymbol = B_Base;
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Type = MachO::ARM64_RELOC_SUBTRACTOR;
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} else { // A + constant
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const MCSymbol *Symbol = &Target.getSymA()->getSymbol();
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const MCSectionMachO &Section =
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static_cast<const MCSectionMachO &>(*Fragment->getParent());
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bool CanUseLocalRelocation =
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canUseLocalRelocation(Section, *Symbol, Log2Size);
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if (Symbol->isTemporary() && (Value || !CanUseLocalRelocation)) {
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// Make sure that the symbol is actually in a section here. If it isn't,
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// emit an error and exit.
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if (!Symbol->isInSection()) {
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Asm.getContext().reportError(
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Fixup.getLoc(),
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"unsupported relocation of local symbol '" + Symbol->getName() +
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"'. Must have non-local symbol earlier in section.");
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return;
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}
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const MCSection &Sec = Symbol->getSection();
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if (!Asm.getContext().getAsmInfo()->isSectionAtomizableBySymbols(Sec))
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Symbol->setUsedInReloc();
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}
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const MCSymbol *Base = Asm.getAtom(*Symbol);
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// If the symbol is a variable it can either be in a section and
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// we have a base or it is absolute and should have been expanded.
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assert(!Symbol->isVariable() || Base);
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// Relocations inside debug sections always use local relocations when
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// possible. This seems to be done because the debugger doesn't fully
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// understand relocation entries and expects to find values that
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// have already been fixed up.
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if (Symbol->isInSection()) {
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if (Section.hasAttribute(MachO::S_ATTR_DEBUG))
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Base = nullptr;
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}
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// AArch64 uses external relocations as much as possible. For debug
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// sections, and for pointer-sized relocations (.quad), we allow section
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// relocations. It's code sections that run into trouble.
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if (Base) {
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RelSymbol = Base;
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|
// Add the local offset, if needed.
|
||
|
|
if (Base != Symbol)
|
||
|
|
Value +=
|
||
|
|
Layout.getSymbolOffset(*Symbol) - Layout.getSymbolOffset(*Base);
|
||
|
|
} else if (Symbol->isInSection()) {
|
||
|
|
if (!CanUseLocalRelocation) {
|
||
|
|
Asm.getContext().reportError(
|
||
|
|
Fixup.getLoc(),
|
||
|
|
"unsupported relocation of local symbol '" + Symbol->getName() +
|
||
|
|
"'. Must have non-local symbol earlier in section.");
|
||
|
|
return;
|
||
|
|
}
|
||
|
|
// Adjust the relocation to be section-relative.
|
||
|
|
// The index is the section ordinal (1-based).
|
||
|
|
const MCSection &Sec = Symbol->getSection();
|
||
|
|
Index = Sec.getOrdinal() + 1;
|
||
|
|
Value += Writer->getSymbolAddress(*Symbol, Layout);
|
||
|
|
|
||
|
|
if (IsPCRel)
|
||
|
|
Value -= Writer->getFragmentAddress(Fragment, Layout) +
|
||
|
|
Fixup.getOffset() + (1ULL << Log2Size);
|
||
|
|
} else {
|
||
|
|
llvm_unreachable(
|
||
|
|
"This constant variable should have been expanded during evaluation");
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
// If the relocation kind is Branch26, Page21, or Pageoff12, any addend
|
||
|
|
// is represented via an Addend relocation, not encoded directly into
|
||
|
|
// the instruction.
|
||
|
|
if ((Type == MachO::ARM64_RELOC_BRANCH26 ||
|
||
|
|
Type == MachO::ARM64_RELOC_PAGE21 ||
|
||
|
|
Type == MachO::ARM64_RELOC_PAGEOFF12) &&
|
||
|
|
Value) {
|
||
|
|
if (!isInt<24>(Value)) {
|
||
|
|
Asm.getContext().reportError(Fixup.getLoc(),
|
||
|
|
"addend too big for relocation");
|
||
|
|
return;
|
||
|
|
}
|
||
|
|
|
||
|
|
MachO::any_relocation_info MRE;
|
||
|
|
MRE.r_word0 = FixupOffset;
|
||
|
|
MRE.r_word1 =
|
||
|
|
(Index << 0) | (IsPCRel << 24) | (Log2Size << 25) | (Type << 28);
|
||
|
|
Writer->addRelocation(RelSymbol, Fragment->getParent(), MRE);
|
||
|
|
|
||
|
|
// Now set up the Addend relocation.
|
||
|
|
Type = MachO::ARM64_RELOC_ADDEND;
|
||
|
|
Index = Value;
|
||
|
|
RelSymbol = nullptr;
|
||
|
|
IsPCRel = 0;
|
||
|
|
Log2Size = 2;
|
||
|
|
|
||
|
|
// Put zero into the instruction itself. The addend is in the relocation.
|
||
|
|
Value = 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
// If there's any addend left to handle, encode it in the instruction.
|
||
|
|
FixedValue = Value;
|
||
|
|
|
||
|
|
// struct relocation_info (8 bytes)
|
||
|
|
MachO::any_relocation_info MRE;
|
||
|
|
MRE.r_word0 = FixupOffset;
|
||
|
|
MRE.r_word1 =
|
||
|
|
(Index << 0) | (IsPCRel << 24) | (Log2Size << 25) | (Type << 28);
|
||
|
|
Writer->addRelocation(RelSymbol, Fragment->getParent(), MRE);
|
||
|
|
}
|
||
|
|
|
||
|
|
std::unique_ptr<MCObjectTargetWriter>
|
||
|
|
llvm::createAArch64MachObjectWriter(uint32_t CPUType, uint32_t CPUSubtype,
|
||
|
|
bool IsILP32) {
|
||
|
|
return std::make_unique<AArch64MachObjectWriter>(CPUType, CPUSubtype,
|
||
|
|
IsILP32);
|
||
|
|
}
|