87 lines
3.1 KiB
C++
87 lines
3.1 KiB
C++
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//===--------------------- DispatchStatistics.cpp ---------------------*- C++
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//-*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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/// \file
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///
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/// This file implements the DispatchStatistics interface.
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///
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//===----------------------------------------------------------------------===//
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#include "Views/DispatchStatistics.h"
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#include "llvm/Support/Format.h"
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namespace llvm {
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namespace mca {
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void DispatchStatistics::onEvent(const HWStallEvent &Event) {
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if (Event.Type < HWStallEvent::LastGenericEvent)
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HWStalls[Event.Type]++;
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}
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void DispatchStatistics::onEvent(const HWInstructionEvent &Event) {
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if (Event.Type != HWInstructionEvent::Dispatched)
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return;
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const auto &DE = static_cast<const HWInstructionDispatchedEvent &>(Event);
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NumDispatched += DE.MicroOpcodes;
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}
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void DispatchStatistics::printDispatchHistogram(raw_ostream &OS) const {
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std::string Buffer;
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raw_string_ostream TempStream(Buffer);
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TempStream << "\n\nDispatch Logic - "
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<< "number of cycles where we saw N micro opcodes dispatched:\n";
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TempStream << "[# dispatched], [# cycles]\n";
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for (const std::pair<const unsigned, unsigned> &Entry :
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DispatchGroupSizePerCycle) {
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double Percentage = ((double)Entry.second / NumCycles) * 100.0;
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TempStream << " " << Entry.first << ", " << Entry.second
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<< " (" << format("%.1f", floor((Percentage * 10) + 0.5) / 10)
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<< "%)\n";
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}
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TempStream.flush();
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OS << Buffer;
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}
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static void printStalls(raw_ostream &OS, unsigned NumStalls,
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unsigned NumCycles) {
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if (!NumStalls) {
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OS << NumStalls;
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return;
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}
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double Percentage = ((double)NumStalls / NumCycles) * 100.0;
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OS << NumStalls << " ("
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<< format("%.1f", floor((Percentage * 10) + 0.5) / 10) << "%)";
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}
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void DispatchStatistics::printDispatchStalls(raw_ostream &OS) const {
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std::string Buffer;
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raw_string_ostream SS(Buffer);
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SS << "\n\nDynamic Dispatch Stall Cycles:\n";
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SS << "RAT - Register unavailable: ";
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printStalls(SS, HWStalls[HWStallEvent::RegisterFileStall], NumCycles);
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SS << "\nRCU - Retire tokens unavailable: ";
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printStalls(SS, HWStalls[HWStallEvent::RetireControlUnitStall], NumCycles);
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SS << "\nSCHEDQ - Scheduler full: ";
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printStalls(SS, HWStalls[HWStallEvent::SchedulerQueueFull], NumCycles);
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SS << "\nLQ - Load queue full: ";
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printStalls(SS, HWStalls[HWStallEvent::LoadQueueFull], NumCycles);
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SS << "\nSQ - Store queue full: ";
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printStalls(SS, HWStalls[HWStallEvent::StoreQueueFull], NumCycles);
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SS << "\nGROUP - Static restrictions on the dispatch group: ";
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printStalls(SS, HWStalls[HWStallEvent::DispatchGroupStall], NumCycles);
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SS << '\n';
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SS.flush();
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OS << Buffer;
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}
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} // namespace mca
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} // namespace llvm
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