176 lines
8.6 KiB
C++
176 lines
8.6 KiB
C++
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// RUN: %clang_cc1 -triple powerpc64le-unknown-linux-gnu -emit-llvm -o - %s | FileCheck %s --check-prefix=PPC
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// RUN: %clang_cc1 -mfloat-abi hard -triple armv7-unknown-linux-gnueabi -emit-llvm -o - %s | FileCheck %s --check-prefix=ARM32
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// RUN: %clang_cc1 -mfloat-abi hard -triple aarch64-unknown-linux-gnu -emit-llvm -o - %s | FileCheck %s --check-prefix=ARM64
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// RUN: %clang_cc1 -mfloat-abi hard -triple x86_64-unknown-windows-gnu -emit-llvm -o - %s | FileCheck %s --check-prefix=X64
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// RUN: %clang_cc1 -mfloat-abi hard -triple aarch64-unknown-windows-msvc -emit-llvm -o - %s | FileCheck %s --check-prefix=WOA64
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#if defined(__x86_64__)
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#define CC __attribute__((vectorcall))
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#else
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#define CC
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#endif
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// Test that C++ classes are correctly classified as homogeneous aggregates.
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struct Base1 {
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int x;
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};
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struct Base2 {
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double x;
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};
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struct Base3 {
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double x;
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};
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struct D1 : Base1 { // non-homogeneous aggregate
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double y, z;
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};
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struct D2 : Base2 { // homogeneous aggregate
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double y, z;
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};
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struct D3 : Base1, Base2 { // non-homogeneous aggregate
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double y, z;
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};
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struct D4 : Base2, Base3 { // homogeneous aggregate
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double y, z;
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};
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struct I1 : Base2 {};
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struct I2 : Base2 {};
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struct I3 : Base2 {};
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struct D5 : I1, I2, I3 {}; // homogeneous aggregate
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// PPC: define{{.*}} void @_Z7func_D12D1(%struct.D1* noalias sret(%struct.D1) align 8 %agg.result, [3 x i64] %x.coerce)
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// ARM32: define{{.*}} arm_aapcs_vfpcc void @_Z7func_D12D1(%struct.D1* noalias sret(%struct.D1) align 8 %agg.result, [3 x i64] %x.coerce)
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// ARM64: define{{.*}} void @_Z7func_D12D1(%struct.D1* noalias sret(%struct.D1) align 8 %agg.result, %struct.D1* %x)
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// X64: define dso_local x86_vectorcallcc void @"\01_Z7func_D12D1@@24"(%struct.D1* noalias sret(%struct.D1) align 8 %agg.result, %struct.D1* %x)
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D1 CC func_D1(D1 x) { return x; }
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// PPC: define{{.*}} [3 x double] @_Z7func_D22D2([3 x double] %x.coerce)
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// ARM32: define{{.*}} arm_aapcs_vfpcc %struct.D2 @_Z7func_D22D2(%struct.D2 %x.coerce)
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// ARM64: define{{.*}} %struct.D2 @_Z7func_D22D2([3 x double] %x.coerce)
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// X64: define dso_local x86_vectorcallcc %struct.D2 @"\01_Z7func_D22D2@@24"(%struct.D2 inreg %x.coerce)
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D2 CC func_D2(D2 x) { return x; }
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// PPC: define{{.*}} void @_Z7func_D32D3(%struct.D3* noalias sret(%struct.D3) align 8 %agg.result, [4 x i64] %x.coerce)
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// ARM32: define{{.*}} arm_aapcs_vfpcc void @_Z7func_D32D3(%struct.D3* noalias sret(%struct.D3) align 8 %agg.result, [4 x i64] %x.coerce)
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// ARM64: define{{.*}} void @_Z7func_D32D3(%struct.D3* noalias sret(%struct.D3) align 8 %agg.result, %struct.D3* %x)
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D3 CC func_D3(D3 x) { return x; }
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// PPC: define{{.*}} [4 x double] @_Z7func_D42D4([4 x double] %x.coerce)
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// ARM32: define{{.*}} arm_aapcs_vfpcc %struct.D4 @_Z7func_D42D4(%struct.D4 %x.coerce)
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// ARM64: define{{.*}} %struct.D4 @_Z7func_D42D4([4 x double] %x.coerce)
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D4 CC func_D4(D4 x) { return x; }
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D5 CC func_D5(D5 x) { return x; }
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// PPC: define{{.*}} [3 x double] @_Z7func_D52D5([3 x double] %x.coerce)
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// ARM32: define{{.*}} arm_aapcs_vfpcc %struct.D5 @_Z7func_D52D5(%struct.D5 %x.coerce)
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// The C++ multiple inheritance expansion case is a little more complicated, so
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// do some extra checking.
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//
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// ARM64-LABEL: define{{.*}} %struct.D5 @_Z7func_D52D5([3 x double] %x.coerce)
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// ARM64: bitcast %struct.D5* %{{.*}} to [3 x double]*
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// ARM64: store [3 x double] %x.coerce, [3 x double]*
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void call_D5(D5 *p) {
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func_D5(*p);
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}
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// Check the call site.
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//
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// ARM64-LABEL: define{{.*}} void @_Z7call_D5P2D5(%struct.D5* %p)
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// ARM64: load [3 x double], [3 x double]*
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// ARM64: call %struct.D5 @_Z7func_D52D5([3 x double] %{{.*}})
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struct Empty { };
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struct Float1 { float x; };
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struct Float2 { float y; };
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struct HVAWithEmptyBase : Float1, Empty, Float2 { float z; };
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// PPC: define{{.*}} void @_Z15with_empty_base16HVAWithEmptyBase([3 x float] %a.coerce)
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// ARM64: define{{.*}} void @_Z15with_empty_base16HVAWithEmptyBase([3 x float] %a.coerce)
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// ARM32: define{{.*}} arm_aapcs_vfpcc void @_Z15with_empty_base16HVAWithEmptyBase(%struct.HVAWithEmptyBase %a.coerce)
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void CC with_empty_base(HVAWithEmptyBase a) {}
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// FIXME: MSVC doesn't consider this an HVA because of the empty base.
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// X64: define dso_local x86_vectorcallcc void @"\01_Z15with_empty_base16HVAWithEmptyBase@@16"(%struct.HVAWithEmptyBase inreg %a.coerce)
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struct HVAWithEmptyBitField : Float1, Float2 {
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int : 0; // Takes no space.
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float z;
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};
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// PPC: define{{.*}} void @_Z19with_empty_bitfield20HVAWithEmptyBitField([3 x float] %a.coerce)
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// ARM64: define{{.*}} void @_Z19with_empty_bitfield20HVAWithEmptyBitField([3 x float] %a.coerce)
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// ARM32: define{{.*}} arm_aapcs_vfpcc void @_Z19with_empty_bitfield20HVAWithEmptyBitField(%struct.HVAWithEmptyBitField %a.coerce)
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// X64: define dso_local x86_vectorcallcc void @"\01_Z19with_empty_bitfield20HVAWithEmptyBitField@@16"(%struct.HVAWithEmptyBitField inreg %a.coerce)
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void CC with_empty_bitfield(HVAWithEmptyBitField a) {}
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namespace pr47611 {
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// MSVC on Arm includes "isCXX14Aggregate" as part of its definition of
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// Homogeneous Floating-point Aggregate (HFA). Additionally, it has a different
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// handling of C++14 aggregates, which can lead to confusion.
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// Pod is a trivial HFA.
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struct Pod {
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double b[2];
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};
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// Not an aggregate according to C++14 spec => not HFA according to MSVC.
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struct NotCXX14Aggregate {
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NotCXX14Aggregate();
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Pod p;
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};
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// NotPod is a C++14 aggregate. But not HFA, because it contains
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// NotCXX14Aggregate (which itself is not HFA because it's not a C++14
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// aggregate).
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struct NotPod {
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NotCXX14Aggregate x;
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};
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struct Empty {};
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// A class with a base is returned using the sret calling convetion by MSVC.
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struct HasEmptyBase : public Empty {
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double b[2];
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};
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struct HasPodBase : public Pod {};
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// WOA64-LABEL: define dso_local %"struct.pr47611::Pod" @"?copy@pr47611@@YA?AUPod@1@PEAU21@@Z"(%"struct.pr47611::Pod"* %x)
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Pod copy(Pod *x) { return *x; } // MSVC: ldp d0,d1,[x0], Clang: ldp d0,d1,[x0]
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// WOA64-LABEL: define dso_local void @"?copy@pr47611@@YA?AUNotCXX14Aggregate@1@PEAU21@@Z"(%"struct.pr47611::NotCXX14Aggregate"* inreg noalias sret(%"struct.pr47611::NotCXX14Aggregate") align 8 %agg.result, %"struct.pr47611::NotCXX14Aggregate"* %x)
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NotCXX14Aggregate copy(NotCXX14Aggregate *x) { return *x; } // MSVC: stp x8,x9,[x0], Clang: str q0,[x0]
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// WOA64-LABEL: define dso_local [2 x i64] @"?copy@pr47611@@YA?AUNotPod@1@PEAU21@@Z"(%"struct.pr47611::NotPod"* %x)
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NotPod copy(NotPod *x) { return *x; }
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// WOA64-LABEL: define dso_local void @"?copy@pr47611@@YA?AUHasEmptyBase@1@PEAU21@@Z"(%"struct.pr47611::HasEmptyBase"* inreg noalias sret(%"struct.pr47611::HasEmptyBase") align 8 %agg.result, %"struct.pr47611::HasEmptyBase"* %x)
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HasEmptyBase copy(HasEmptyBase *x) { return *x; }
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// WOA64-LABEL: define dso_local void @"?copy@pr47611@@YA?AUHasPodBase@1@PEAU21@@Z"(%"struct.pr47611::HasPodBase"* inreg noalias sret(%"struct.pr47611::HasPodBase") align 8 %agg.result, %"struct.pr47611::HasPodBase"* %x)
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HasPodBase copy(HasPodBase *x) { return *x; }
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void call_copy_pod(Pod *pod) {
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*pod = copy(pod);
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// WOA64-LABEL: define dso_local void @"?call_copy_pod@pr47611@@YAXPEAUPod@1@@Z"
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// WOA64: %{{.*}} = call %"struct.pr47611::Pod" @"?copy@pr47611@@YA?AUPod@1@PEAU21@@Z"(%"struct.pr47611::Pod"* %{{.*}})
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}
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void call_copy_notcxx14aggregate(NotCXX14Aggregate *notcxx14aggregate) {
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*notcxx14aggregate = copy(notcxx14aggregate);
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// WOA64-LABEL: define dso_local void @"?call_copy_notcxx14aggregate@pr47611@@YAXPEAUNotCXX14Aggregate@1@@Z"
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// WOA64: call void @"?copy@pr47611@@YA?AUNotCXX14Aggregate@1@PEAU21@@Z"(%"struct.pr47611::NotCXX14Aggregate"* inreg sret(%"struct.pr47611::NotCXX14Aggregate") align 8 %{{.*}}, %"struct.pr47611::NotCXX14Aggregate"* %{{.*}})
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}
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void call_copy_notpod(NotPod *notPod) {
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*notPod = copy(notPod);
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// WOA64-LABEL: define dso_local void @"?call_copy_notpod@pr47611@@YAXPEAUNotPod@1@@Z"
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// WOA64: %{{.*}} = call [2 x i64] @"?copy@pr47611@@YA?AUNotPod@1@PEAU21@@Z"(%"struct.pr47611::NotPod"* %{{.*}})
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}
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void call_copy_hasemptybase(HasEmptyBase *hasEmptyBase) {
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*hasEmptyBase = copy(hasEmptyBase);
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// WOA64-LABEL: define dso_local void @"?call_copy_hasemptybase@pr47611@@YAXPEAUHasEmptyBase@1@@Z"
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// WOA64: call void @"?copy@pr47611@@YA?AUHasEmptyBase@1@PEAU21@@Z"(%"struct.pr47611::HasEmptyBase"* inreg sret(%"struct.pr47611::HasEmptyBase") align 8 %{{.*}}, %"struct.pr47611::HasEmptyBase"* %{{.*}})
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}
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void call_copy_haspodbase(HasPodBase *hasPodBase) {
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*hasPodBase = copy(hasPodBase);
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// WOA64-LABEL: define dso_local void @"?call_copy_haspodbase@pr47611@@YAXPEAUHasPodBase@1@@Z"
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// WOA64: call void @"?copy@pr47611@@YA?AUHasPodBase@1@PEAU21@@Z"(%"struct.pr47611::HasPodBase"* inreg sret(%"struct.pr47611::HasPodBase") align 8 %{{.*}}, %"struct.pr47611::HasPodBase"* %{{.*}})
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}
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}; // namespace pr47611
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