40 lines
1.9 KiB
ArmAsm
40 lines
1.9 KiB
ArmAsm
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# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
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# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2 -all-views=false -instruction-info < %s | FileCheck %s --check-prefix=DEFAULT
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# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2 -all-views=false -instruction-info -print-imm-hex=false < %s | FileCheck %s --check-prefix=DEFAULT
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# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2 -all-views=false -instruction-info -print-imm-hex < %s | FileCheck %s --check-prefix=HEX
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# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2 -all-views=false -instruction-info -print-imm-hex=true < %s | FileCheck %s --check-prefix=HEX
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.intel_syntax noprefix
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shl eax, 8
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shl eax, 0x8
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shl eax, 8h
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shl eax, 1000b
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# DEFAULT: Instruction Info:
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# DEFAULT-NEXT: [1]: #uOps
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# DEFAULT-NEXT: [2]: Latency
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# DEFAULT-NEXT: [3]: RThroughput
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# DEFAULT-NEXT: [4]: MayLoad
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# DEFAULT-NEXT: [5]: MayStore
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# DEFAULT-NEXT: [6]: HasSideEffects (U)
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# HEX: Instruction Info:
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# HEX-NEXT: [1]: #uOps
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# HEX-NEXT: [2]: Latency
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# HEX-NEXT: [3]: RThroughput
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# HEX-NEXT: [4]: MayLoad
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# HEX-NEXT: [5]: MayStore
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# HEX-NEXT: [6]: HasSideEffects (U)
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# DEFAULT: [1] [2] [3] [4] [5] [6] Instructions:
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# DEFAULT-NEXT: 1 1 0.50 shl eax, 8
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# DEFAULT-NEXT: 1 1 0.50 shl eax, 8
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# DEFAULT-NEXT: 1 1 0.50 shl eax, 8
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# DEFAULT-NEXT: 1 1 0.50 shl eax, 8
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# HEX: [1] [2] [3] [4] [5] [6] Instructions:
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# HEX-NEXT: 1 1 0.50 shl eax, 0x8
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# HEX-NEXT: 1 1 0.50 shl eax, 0x8
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# HEX-NEXT: 1 1 0.50 shl eax, 0x8
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# HEX-NEXT: 1 1 0.50 shl eax, 0x8
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