96 lines
4.7 KiB
ArmAsm
96 lines
4.7 KiB
ArmAsm
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# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
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# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver2 -iterations=1500 -timeline -timeline-max-iterations=7 < %s | FileCheck %s
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# The lzcnt cannot execute in parallel with the imul because there is a false
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# dependency on %bx.
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imul %ax, %bx
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lzcnt %ax, %bx
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add %cx, %bx
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# CHECK: Iterations: 1500
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# CHECK-NEXT: Instructions: 4500
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# CHECK-NEXT: Total Cycles: 7503
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# CHECK-NEXT: Total uOps: 4500
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# CHECK: Dispatch Width: 4
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# CHECK-NEXT: uOps Per Cycle: 0.60
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# CHECK-NEXT: IPC: 0.60
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# CHECK-NEXT: Block RThroughput: 1.0
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# CHECK: Instruction Info:
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# CHECK-NEXT: [1]: #uOps
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# CHECK-NEXT: [2]: Latency
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# CHECK-NEXT: [3]: RThroughput
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# CHECK-NEXT: [4]: MayLoad
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# CHECK-NEXT: [5]: MayStore
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# CHECK-NEXT: [6]: HasSideEffects (U)
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# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
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# CHECK-NEXT: 1 3 1.00 imulw %ax, %bx
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# CHECK-NEXT: 1 1 0.25 lzcntw %ax, %bx
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# CHECK-NEXT: 1 1 0.25 addw %cx, %bx
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# CHECK: Resources:
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# CHECK-NEXT: [0] - Zn2AGU0
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# CHECK-NEXT: [1] - Zn2AGU1
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# CHECK-NEXT: [2] - Zn2AGU2
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# CHECK-NEXT: [3] - Zn2ALU0
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# CHECK-NEXT: [4] - Zn2ALU1
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# CHECK-NEXT: [5] - Zn2ALU2
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# CHECK-NEXT: [6] - Zn2ALU3
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# CHECK-NEXT: [7] - Zn2Divider
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# CHECK-NEXT: [8] - Zn2FPU0
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# CHECK-NEXT: [9] - Zn2FPU1
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# CHECK-NEXT: [10] - Zn2FPU2
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# CHECK-NEXT: [11] - Zn2FPU3
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# CHECK-NEXT: [12] - Zn2Multiplier
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# CHECK: Resource pressure per iteration:
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# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12]
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# CHECK-NEXT: - - - 0.67 1.00 0.67 0.67 - - - - - 1.00
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# CHECK: Resource pressure by instruction:
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# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions:
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# CHECK-NEXT: - - - - 1.00 - - - - - - - 1.00 imulw %ax, %bx
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# CHECK-NEXT: - - - 0.33 - 0.33 0.33 - - - - - - lzcntw %ax, %bx
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# CHECK-NEXT: - - - 0.33 - 0.33 0.33 - - - - - - addw %cx, %bx
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# CHECK: Timeline view:
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# CHECK-NEXT: 0123456789 01234567
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# CHECK-NEXT: Index 0123456789 0123456789
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# CHECK: [0,0] DeeeER . . . . . . . imulw %ax, %bx
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# CHECK-NEXT: [0,1] D===eER . . . . . . . lzcntw %ax, %bx
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# CHECK-NEXT: [0,2] D====eER . . . . . . . addw %cx, %bx
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# CHECK-NEXT: [1,0] D=====eeeER . . . . . . imulw %ax, %bx
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# CHECK-NEXT: [1,1] .D=======eER . . . . . . lzcntw %ax, %bx
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# CHECK-NEXT: [1,2] .D========eER . . . . . . addw %cx, %bx
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# CHECK-NEXT: [2,0] .D=========eeeER . . . . . imulw %ax, %bx
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# CHECK-NEXT: [2,1] .D============eER . . . . . lzcntw %ax, %bx
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# CHECK-NEXT: [2,2] . D============eER . . . . . addw %cx, %bx
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# CHECK-NEXT: [3,0] . D=============eeeER . . . . imulw %ax, %bx
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# CHECK-NEXT: [3,1] . D================eER . . . . lzcntw %ax, %bx
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# CHECK-NEXT: [3,2] . D=================eER . . . . addw %cx, %bx
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# CHECK-NEXT: [4,0] . D=================eeeER . . . imulw %ax, %bx
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# CHECK-NEXT: [4,1] . D====================eER . . . lzcntw %ax, %bx
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# CHECK-NEXT: [4,2] . D=====================eER . . . addw %cx, %bx
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# CHECK-NEXT: [5,0] . D======================eeeER . . imulw %ax, %bx
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# CHECK-NEXT: [5,1] . D========================eER . . lzcntw %ax, %bx
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# CHECK-NEXT: [5,2] . D=========================eER . . addw %cx, %bx
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# CHECK-NEXT: [6,0] . D==========================eeeER . imulw %ax, %bx
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# CHECK-NEXT: [6,1] . D=============================eER. lzcntw %ax, %bx
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# CHECK-NEXT: [6,2] . D=============================eER addw %cx, %bx
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# CHECK: Average Wait times (based on the timeline view):
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# CHECK-NEXT: [0]: Executions
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# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
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# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
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# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
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# CHECK: [0] [1] [2] [3]
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# CHECK-NEXT: 0. 7 14.1 0.1 0.0 imulw %ax, %bx
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# CHECK-NEXT: 1. 7 16.9 0.0 0.0 lzcntw %ax, %bx
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# CHECK-NEXT: 2. 7 17.6 0.0 0.0 addw %cx, %bx
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# CHECK-NEXT: 7 16.2 0.0 0.0 <total>
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