60 lines
2.2 KiB
ArmAsm
60 lines
2.2 KiB
ArmAsm
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# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
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# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -iterations=1500 -timeline -timeline-max-iterations=3 < %s | FileCheck %s
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lzcnt %ax, %bx ## partial register stall.
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# CHECK: Iterations: 1500
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# CHECK-NEXT: Instructions: 1500
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# CHECK-NEXT: Total Cycles: 1505
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# CHECK-NEXT: Total uOps: 1500
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# CHECK: Dispatch Width: 4
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# CHECK-NEXT: uOps Per Cycle: 1.00
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# CHECK-NEXT: IPC: 1.00
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# CHECK-NEXT: Block RThroughput: 1.0
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# CHECK: Instruction Info:
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# CHECK-NEXT: [1]: #uOps
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# CHECK-NEXT: [2]: Latency
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# CHECK-NEXT: [3]: RThroughput
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# CHECK-NEXT: [4]: MayLoad
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# CHECK-NEXT: [5]: MayStore
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# CHECK-NEXT: [6]: HasSideEffects (U)
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# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
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# CHECK-NEXT: 1 3 1.00 lzcntw %ax, %bx
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# CHECK: Resources:
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# CHECK-NEXT: [0] - SBDivider
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# CHECK-NEXT: [1] - SBFPDivider
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# CHECK-NEXT: [2] - SBPort0
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# CHECK-NEXT: [3] - SBPort1
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# CHECK-NEXT: [4] - SBPort4
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# CHECK-NEXT: [5] - SBPort5
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# CHECK-NEXT: [6.0] - SBPort23
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# CHECK-NEXT: [6.1] - SBPort23
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# CHECK: Resource pressure per iteration:
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# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1]
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# CHECK-NEXT: - - - 1.00 - - - -
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# CHECK: Resource pressure by instruction:
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# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions:
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# CHECK-NEXT: - - - 1.00 - - - - lzcntw %ax, %bx
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# CHECK: Timeline view:
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# CHECK-NEXT: Index 01234567
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# CHECK: [0,0] DeeeER . lzcntw %ax, %bx
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# CHECK-NEXT: [1,0] D=eeeER. lzcntw %ax, %bx
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# CHECK-NEXT: [2,0] D==eeeER lzcntw %ax, %bx
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# CHECK: Average Wait times (based on the timeline view):
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# CHECK-NEXT: [0]: Executions
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# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
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# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
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# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
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# CHECK: [0] [1] [2] [3]
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# CHECK-NEXT: 0. 3 2.0 2.0 0.0 lzcntw %ax, %bx
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