391 lines
27 KiB
ArmAsm
391 lines
27 KiB
ArmAsm
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# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
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# RUN: llvm-mca -mtriple=thumbv7-m.main-none-none-eabi -mcpu=cortex-m7 -mattr=+fp64 -instruction-tables < %s | FileCheck %s
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vabs.f32 s0, s2
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vabs.f64 d0, d2
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vadd.f32 s0, s2, s1
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vadd.f64 d0, d2, d1
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vcmp.f32 s1, s2
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vcmp.f64 d1, d2
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vcvt.f32.f64 s1, d2
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vcvt.f64.f32 d1, s1
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vcvt.f32.u16 s1, s2, #8
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vcvt.f32.s16 s1, s2, #8
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vcvt.f32.u32 s1, s2, #8
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vcvt.f32.s32 s1, s2, #8
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vcvt.u16.f32 s1, s2, #8
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vcvt.s16.f32 s1, s2, #8
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vcvt.u32.f32 s1, s2, #8
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vcvt.s32.f32 s1, s2, #8
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vcvt.f64.u16 d1, d2, #8
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vcvt.f64.s16 d1, d2, #8
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vcvt.f64.u32 d1, d2, #8
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vcvt.f64.s32 d1, d2, #8
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vcvt.u16.f64 d1, d2, #8
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vcvt.s16.f64 d1, d2, #8
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vcvt.u32.f64 d1, d2, #8
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vcvt.s32.f64 d1, d2, #8
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vcvt.u32.f32 s1, s2
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vcvt.s32.f32 s1, s2
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vcvt.u32.f64 s1, d2
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vcvt.s32.f64 s1, d2
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vcvt.f32.u32 s1, s2
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vcvt.f32.s32 s1, s2
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vcvt.f64.u32 d1, s2
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vcvt.f64.s32 d1, s2
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vcvta.u32.f32 s1, s2
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vcvta.s32.f32 s1, s2
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vcvta.u32.f64 s1, d2
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vcvta.s32.f64 s1, d2
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vcvtm.u32.f32 s1, s2
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vcvtm.s32.f32 s1, s2
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vcvtm.u32.f64 s1, d2
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vcvtm.s32.f64 s1, d2
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vcvtn.u32.f32 s1, s2
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vcvtn.s32.f32 s1, s2
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vcvtn.u32.f64 s1, d2
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vcvtn.s32.f64 s1, d2
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vcvtp.u32.f32 s1, s2
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vcvtp.s32.f32 s1, s2
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vcvtp.u32.f64 s1, d2
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vcvtp.s32.f64 s1, d2
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vcvtb.f32.f16 s1, s2
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vcvtb.f16.f32 s1, s2
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vcvtr.u32.f32 s1, s2
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vcvtr.s32.f32 s1, s2
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vcvtr.u32.f64 s1, d2
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vcvtr.s32.f64 s1, d2
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vcvtt.f16.f32 s1, s2
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vcvtt.f32.f16 s1, s2
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vdiv.f32 s0, s2, s1
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vdiv.f64 d0, d2, d1
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vfma.f32 s0, s2, s1
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vfma.f64 d0, d2, d1
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vfms.f32 s0, s2, s1
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vfms.f64 d0, d2, d1
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vfnma.f32 s0, s2, s1
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vfnma.f64 d0, d2, d1
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vfnms.f32 s0, s2, s1
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vfnms.f64 d0, d2, d1
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vmaxnm.f32 s0, s2, s1
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vmaxnm.f64 d0, d2, d1
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vminnm.f32 s0, s2, s1
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vminnm.f64 d0, d2, d1
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vmla.f32 s0, s2, s1
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vmla.f64 d0, d2, d1
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vmls.f32 s0, s2, s1
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vmls.f64 d0, d2, d1
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vmov.f32 s0, r1
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vmov.f32 r0, s1
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vmov.f64 d0, r1, r2
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vmov.f64 r0, r1, d1
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vmov s0, s1, r0, r1
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vmov r0, r1, s0, s1
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vmov.f32 s0, #1.0
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vmov.f64 d0, #1.0
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vmov.f32 s0, s1
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vmov.f64 d0, d1
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vmul.f32 s0, s2, s1
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vmul.f64 d0, d2, d1
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vneg.f32 s0, s2
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vneg.f64 d0, d2
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vnmla.f32 s0, s2, s1
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vnmla.f64 d0, d2, d1
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vnmls.f32 s0, s2, s1
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vnmls.f64 d0, d2, d1
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vnmul.f32 s0, s2, s1
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vnmul.f64 d0, d2, d1
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vrinta.f32.f32 s0, s2
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vrinta.f64.f64 d0, d2
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vrintm.f32.f32 s0, s2
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vrintm.f64.f64 d0, d2
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vrintn.f32.f32 s0, s2
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vrintn.f64.f64 d0, d2
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vrintp.f32.f32 s0, s2
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vrintp.f64.f64 d0, d2
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vrintr.f32.f32 s0, s2
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vrintr.f64.f64 d0, d2
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vrintz.f32.f32 s0, s2
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vrintz.f64.f64 d0, d2
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vrintx.f32.f32 s0, s2
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vrintx.f64.f64 d0, d2
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vseleq.f32 s0, s2, s1
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vseleq.f64 d0, d2, d1
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vsqrt.f32 s0, s2
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vsqrt.f64 d0, d2
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vsub.f32 s0, s2, s1
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vsub.f64 d0, d2, d1
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vldr.f64 d0, [r0]
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vldr.f32 s0, [r0]
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vstr.f64 d0, [r0]
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vstr.f32 s0, [r0]
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# CHECK: Instruction Info:
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# CHECK-NEXT: [1]: #uOps
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# CHECK-NEXT: [2]: Latency
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# CHECK-NEXT: [3]: RThroughput
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# CHECK-NEXT: [4]: MayLoad
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# CHECK-NEXT: [5]: MayStore
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# CHECK-NEXT: [6]: HasSideEffects (U)
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# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
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# CHECK-NEXT: 1 3 1.00 vabs.f32 s0, s2
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# CHECK-NEXT: 1 4 1.00 vabs.f64 d0, d2
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# CHECK-NEXT: 1 3 1.00 vadd.f32 s0, s2, s1
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# CHECK-NEXT: 1 4 1.00 vadd.f64 d0, d2, d1
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# CHECK-NEXT: 1 0 1.00 vcmp.f32 s1, s2
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# CHECK-NEXT: 1 0 1.00 vcmp.f64 d1, d2
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# CHECK-NEXT: 1 4 1.00 vcvt.f32.f64 s1, d2
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# CHECK-NEXT: 1 3 1.00 vcvt.f64.f32 d1, s1
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# CHECK-NEXT: 1 3 1.00 vcvt.f32.u16 s1, s1, #8
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# CHECK-NEXT: 1 3 1.00 vcvt.f32.s16 s1, s1, #8
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# CHECK-NEXT: 1 3 1.00 vcvt.f32.u32 s1, s1, #8
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# CHECK-NEXT: 1 3 1.00 vcvt.f32.s32 s1, s1, #8
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# CHECK-NEXT: 1 3 1.00 vcvt.u16.f32 s1, s1, #8
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# CHECK-NEXT: 1 3 1.00 vcvt.s16.f32 s1, s1, #8
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# CHECK-NEXT: 1 3 1.00 vcvt.u32.f32 s1, s1, #8
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# CHECK-NEXT: 1 3 1.00 vcvt.s32.f32 s1, s1, #8
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# CHECK-NEXT: 1 3 1.00 vcvt.f64.u16 d1, d1, #8
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# CHECK-NEXT: 1 3 1.00 vcvt.f64.s16 d1, d1, #8
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# CHECK-NEXT: 1 3 1.00 vcvt.f64.u32 d1, d1, #8
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# CHECK-NEXT: 1 3 1.00 vcvt.f64.s32 d1, d1, #8
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# CHECK-NEXT: 1 3 1.00 vcvt.u16.f64 d1, d1, #8
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# CHECK-NEXT: 1 3 1.00 vcvt.s16.f64 d1, d1, #8
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# CHECK-NEXT: 1 3 1.00 vcvt.u32.f64 d1, d1, #8
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# CHECK-NEXT: 1 3 1.00 vcvt.s32.f64 d1, d1, #8
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# CHECK-NEXT: 1 3 1.00 vcvt.u32.f32 s1, s2
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# CHECK-NEXT: 1 3 1.00 vcvt.s32.f32 s1, s2
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# CHECK-NEXT: 1 3 1.00 vcvt.u32.f64 s1, d2
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# CHECK-NEXT: 1 3 1.00 vcvt.s32.f64 s1, d2
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# CHECK-NEXT: 1 3 1.00 vcvt.f32.u32 s1, s2
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# CHECK-NEXT: 1 3 1.00 vcvt.f32.s32 s1, s2
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# CHECK-NEXT: 1 3 1.00 vcvt.f64.u32 d1, s2
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# CHECK-NEXT: 1 3 1.00 vcvt.f64.s32 d1, s2
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# CHECK-NEXT: 1 3 1.00 vcvta.u32.f32 s1, s2
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# CHECK-NEXT: 1 3 1.00 vcvta.s32.f32 s1, s2
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# CHECK-NEXT: 1 4 1.00 vcvta.u32.f64 s1, d2
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# CHECK-NEXT: 1 4 1.00 vcvta.s32.f64 s1, d2
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# CHECK-NEXT: 1 3 1.00 vcvtm.u32.f32 s1, s2
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# CHECK-NEXT: 1 3 1.00 vcvtm.s32.f32 s1, s2
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# CHECK-NEXT: 1 4 1.00 vcvtm.u32.f64 s1, d2
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# CHECK-NEXT: 1 4 1.00 vcvtm.s32.f64 s1, d2
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# CHECK-NEXT: 1 3 1.00 vcvtn.u32.f32 s1, s2
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# CHECK-NEXT: 1 3 1.00 vcvtn.s32.f32 s1, s2
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# CHECK-NEXT: 1 4 1.00 vcvtn.u32.f64 s1, d2
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# CHECK-NEXT: 1 4 1.00 vcvtn.s32.f64 s1, d2
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# CHECK-NEXT: 1 3 1.00 vcvtp.u32.f32 s1, s2
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# CHECK-NEXT: 1 3 1.00 vcvtp.s32.f32 s1, s2
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# CHECK-NEXT: 1 4 1.00 vcvtp.u32.f64 s1, d2
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# CHECK-NEXT: 1 4 1.00 vcvtp.s32.f64 s1, d2
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# CHECK-NEXT: 1 3 1.00 vcvtb.f32.f16 s1, s2
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# CHECK-NEXT: 1 3 1.00 vcvtb.f16.f32 s1, s2
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# CHECK-NEXT: 1 3 1.00 vcvtr.u32.f32 s1, s2
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# CHECK-NEXT: 1 3 1.00 vcvtr.s32.f32 s1, s2
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# CHECK-NEXT: 1 3 1.00 vcvtr.u32.f64 s1, d2
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# CHECK-NEXT: 1 3 1.00 vcvtr.s32.f64 s1, d2
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# CHECK-NEXT: 1 3 1.00 vcvtt.f16.f32 s1, s2
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# CHECK-NEXT: 1 3 1.00 vcvtt.f32.f16 s1, s2
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# CHECK-NEXT: 1 16 1.00 vdiv.f32 s0, s2, s1
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# CHECK-NEXT: 1 30 1.00 vdiv.f64 d0, d2, d1
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# CHECK-NEXT: 1 6 1.00 vfma.f32 s0, s2, s1
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# CHECK-NEXT: 1 11 1.00 vfma.f64 d0, d2, d1
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# CHECK-NEXT: 1 6 1.00 vfms.f32 s0, s2, s1
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# CHECK-NEXT: 1 11 1.00 vfms.f64 d0, d2, d1
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# CHECK-NEXT: 1 6 1.00 vfnma.f32 s0, s2, s1
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# CHECK-NEXT: 1 11 1.00 vfnma.f64 d0, d2, d1
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# CHECK-NEXT: 1 6 1.00 vfnms.f32 s0, s2, s1
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# CHECK-NEXT: 1 11 1.00 vfnms.f64 d0, d2, d1
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# CHECK-NEXT: 1 3 1.00 vmaxnm.f32 s0, s2, s1
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# CHECK-NEXT: 1 4 1.00 vmaxnm.f64 d0, d2, d1
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# CHECK-NEXT: 1 3 1.00 vminnm.f32 s0, s2, s1
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# CHECK-NEXT: 1 4 1.00 vminnm.f64 d0, d2, d1
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# CHECK-NEXT: 1 6 1.00 vmla.f32 s0, s2, s1
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# CHECK-NEXT: 1 11 1.00 vmla.f64 d0, d2, d1
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# CHECK-NEXT: 1 6 1.00 vmls.f32 s0, s2, s1
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# CHECK-NEXT: 1 11 1.00 vmls.f64 d0, d2, d1
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# CHECK-NEXT: 1 3 0.50 vmov s0, r1
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# CHECK-NEXT: 1 3 0.50 vmov r0, s1
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# CHECK-NEXT: 1 3 1.00 vmov d0, r1, r2
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# CHECK-NEXT: 1 3 1.00 vmov r0, r1, d1
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# CHECK-NEXT: 1 3 1.00 vmov s0, s1, r0, r1
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# CHECK-NEXT: 1 3 1.00 vmov r0, r1, s0, s1
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# CHECK-NEXT: 1 3 0.50 vmov.f32 s0, #1.000000e+00
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# CHECK-NEXT: 1 3 1.00 vmov.f64 d0, #1.000000e+00
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# CHECK-NEXT: 1 3 0.50 vmov.f32 s0, s1
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# CHECK-NEXT: 1 3 1.00 vmov.f64 d0, d1
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# CHECK-NEXT: 1 3 1.00 vmul.f32 s0, s2, s1
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# CHECK-NEXT: 1 7 1.00 vmul.f64 d0, d2, d1
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# CHECK-NEXT: 1 3 1.00 vneg.f32 s0, s2
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# CHECK-NEXT: 1 4 1.00 vneg.f64 d0, d2
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# CHECK-NEXT: 1 6 1.00 vnmla.f32 s0, s2, s1
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# CHECK-NEXT: 1 11 1.00 vnmla.f64 d0, d2, d1
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# CHECK-NEXT: 1 6 1.00 vnmls.f32 s0, s2, s1
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# CHECK-NEXT: 1 11 1.00 vnmls.f64 d0, d2, d1
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# CHECK-NEXT: 1 3 1.00 vnmul.f32 s0, s2, s1
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# CHECK-NEXT: 1 7 1.00 vnmul.f64 d0, d2, d1
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# CHECK-NEXT: 1 3 1.00 vrinta.f32 s0, s2
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# CHECK-NEXT: 1 4 1.00 vrinta.f64 d0, d2
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# CHECK-NEXT: 1 3 1.00 vrintm.f32 s0, s2
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# CHECK-NEXT: 1 4 1.00 vrintm.f64 d0, d2
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# CHECK-NEXT: 1 3 1.00 vrintn.f32 s0, s2
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# CHECK-NEXT: 1 4 1.00 vrintn.f64 d0, d2
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# CHECK-NEXT: 1 3 1.00 vrintp.f32 s0, s2
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# CHECK-NEXT: 1 4 1.00 vrintp.f64 d0, d2
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# CHECK-NEXT: 1 3 1.00 vrintr.f32 s0, s2
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# CHECK-NEXT: 1 4 1.00 vrintr.f64 d0, d2
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# CHECK-NEXT: 1 3 1.00 vrintz.f32 s0, s2
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# CHECK-NEXT: 1 4 1.00 vrintz.f64 d0, d2
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# CHECK-NEXT: 1 3 1.00 vrintx.f32 s0, s2
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# CHECK-NEXT: 1 4 1.00 vrintx.f64 d0, d2
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# CHECK-NEXT: 1 4 1.00 vseleq.f32 s0, s2, s1
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# CHECK-NEXT: 1 5 1.00 vseleq.f64 d0, d2, d1
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# CHECK-NEXT: 1 16 1.00 vsqrt.f32 s0, s2
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# CHECK-NEXT: 1 30 1.00 vsqrt.f64 d0, d2
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# CHECK-NEXT: 1 3 1.00 vsub.f32 s0, s2, s1
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# CHECK-NEXT: 1 4 1.00 vsub.f64 d0, d2, d1
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# CHECK-NEXT: 1 3 1.00 * vldr d0, [r0]
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# CHECK-NEXT: 1 2 0.50 * vldr s0, [r0]
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# CHECK-NEXT: 1 2 1.00 * vstr d0, [r0]
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# CHECK-NEXT: 1 2 1.00 * vstr s0, [r0]
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# CHECK: Resources:
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# CHECK-NEXT: [0.0] - M7UnitALU
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# CHECK-NEXT: [0.1] - M7UnitALU
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# CHECK-NEXT: [1] - M7UnitBranch
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# CHECK-NEXT: [2.0] - M7UnitLoad
|
||
|
|
# CHECK-NEXT: [2.1] - M7UnitLoad
|
||
|
|
# CHECK-NEXT: [3] - M7UnitMAC
|
||
|
|
# CHECK-NEXT: [4] - M7UnitSIMD
|
||
|
|
# CHECK-NEXT: [5] - M7UnitShift1
|
||
|
|
# CHECK-NEXT: [6] - M7UnitShift2
|
||
|
|
# CHECK-NEXT: [7] - M7UnitStore
|
||
|
|
# CHECK-NEXT: [8] - M7UnitVFP
|
||
|
|
# CHECK-NEXT: [9.0] - M7UnitVPort
|
||
|
|
# CHECK-NEXT: [9.1] - M7UnitVPort
|
||
|
|
|
||
|
|
# CHECK: Resource pressure per iteration:
|
||
|
|
# CHECK-NEXT: [0.0] [0.1] [1] [2.0] [2.1] [3] [4] [5] [6] [7] [8] [9.0] [9.1]
|
||
|
|
# CHECK-NEXT: - - - 1.00 1.00 - - - - 2.00 104.00 81.00 81.00
|
||
|
|
|
||
|
|
# CHECK: Resource pressure by instruction:
|
||
|
|
# CHECK-NEXT: [0.0] [0.1] [1] [2.0] [2.1] [3] [4] [5] [6] [7] [8] [9.0] [9.1] Instructions:
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vabs.f32 s0, s2
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 1.00 1.00 vabs.f64 d0, d2
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vadd.f32 s0, s2, s1
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 1.00 1.00 vadd.f64 d0, d2, d1
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcmp.f32 s1, s2
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 1.00 1.00 vcmp.f64 d1, d2
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 1.00 1.00 vcvt.f32.f64 s1, d2
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvt.f64.f32 d1, s1
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvt.f32.u16 s1, s1, #8
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvt.f32.s16 s1, s1, #8
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvt.f32.u32 s1, s1, #8
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvt.f32.s32 s1, s1, #8
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvt.u16.f32 s1, s1, #8
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvt.s16.f32 s1, s1, #8
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvt.u32.f32 s1, s1, #8
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvt.s32.f32 s1, s1, #8
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvt.f64.u16 d1, d1, #8
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvt.f64.s16 d1, d1, #8
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvt.f64.u32 d1, d1, #8
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvt.f64.s32 d1, d1, #8
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvt.u16.f64 d1, d1, #8
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvt.s16.f64 d1, d1, #8
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvt.u32.f64 d1, d1, #8
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvt.s32.f64 d1, d1, #8
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvt.u32.f32 s1, s2
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvt.s32.f32 s1, s2
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvt.u32.f64 s1, d2
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvt.s32.f64 s1, d2
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvt.f32.u32 s1, s2
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvt.f32.s32 s1, s2
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvt.f64.u32 d1, s2
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvt.f64.s32 d1, s2
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvta.u32.f32 s1, s2
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvta.s32.f32 s1, s2
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 1.00 1.00 vcvta.u32.f64 s1, d2
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 1.00 1.00 vcvta.s32.f64 s1, d2
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvtm.u32.f32 s1, s2
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvtm.s32.f32 s1, s2
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 1.00 1.00 vcvtm.u32.f64 s1, d2
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 1.00 1.00 vcvtm.s32.f64 s1, d2
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvtn.u32.f32 s1, s2
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvtn.s32.f32 s1, s2
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 1.00 1.00 vcvtn.u32.f64 s1, d2
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 1.00 1.00 vcvtn.s32.f64 s1, d2
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvtp.u32.f32 s1, s2
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvtp.s32.f32 s1, s2
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 1.00 1.00 vcvtp.u32.f64 s1, d2
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 1.00 1.00 vcvtp.s32.f64 s1, d2
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvtb.f32.f16 s1, s2
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvtb.f16.f32 s1, s2
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvtr.u32.f32 s1, s2
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvtr.s32.f32 s1, s2
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvtr.u32.f64 s1, d2
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvtr.s32.f64 s1, d2
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvtt.f16.f32 s1, s2
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vcvtt.f32.f16 s1, s2
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vdiv.f32 s0, s2, s1
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 1.00 1.00 vdiv.f64 d0, d2, d1
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vfma.f32 s0, s2, s1
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 1.00 1.00 vfma.f64 d0, d2, d1
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vfms.f32 s0, s2, s1
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 1.00 1.00 vfms.f64 d0, d2, d1
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vfnma.f32 s0, s2, s1
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 1.00 1.00 vfnma.f64 d0, d2, d1
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vfnms.f32 s0, s2, s1
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 1.00 1.00 vfnms.f64 d0, d2, d1
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vmaxnm.f32 s0, s2, s1
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 1.00 1.00 vmaxnm.f64 d0, d2, d1
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vminnm.f32 s0, s2, s1
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 1.00 1.00 vminnm.f64 d0, d2, d1
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vmla.f32 s0, s2, s1
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 1.00 1.00 vmla.f64 d0, d2, d1
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vmls.f32 s0, s2, s1
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 1.00 1.00 vmls.f64 d0, d2, d1
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vmov s0, r1
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vmov r0, s1
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - - 1.00 1.00 vmov d0, r1, r2
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - - 1.00 1.00 vmov r0, r1, d1
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - - 1.00 1.00 vmov s0, s1, r0, r1
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - - 1.00 1.00 vmov r0, r1, s0, s1
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vmov.f32 s0, #1.000000e+00
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - - 1.00 1.00 vmov.f64 d0, #1.000000e+00
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - - 0.50 0.50 vmov.f32 s0, s1
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - - 1.00 1.00 vmov.f64 d0, d1
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vmul.f32 s0, s2, s1
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 1.00 1.00 vmul.f64 d0, d2, d1
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vneg.f32 s0, s2
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 1.00 1.00 vneg.f64 d0, d2
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vnmla.f32 s0, s2, s1
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 1.00 1.00 vnmla.f64 d0, d2, d1
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vnmls.f32 s0, s2, s1
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 1.00 1.00 vnmls.f64 d0, d2, d1
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vnmul.f32 s0, s2, s1
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 1.00 1.00 vnmul.f64 d0, d2, d1
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vrinta.f32 s0, s2
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 1.00 1.00 vrinta.f64 d0, d2
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vrintm.f32 s0, s2
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 1.00 1.00 vrintm.f64 d0, d2
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vrintn.f32 s0, s2
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 1.00 1.00 vrintn.f64 d0, d2
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vrintp.f32 s0, s2
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 1.00 1.00 vrintp.f64 d0, d2
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vrintr.f32 s0, s2
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 1.00 1.00 vrintr.f64 d0, d2
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vrintz.f32 s0, s2
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 1.00 1.00 vrintz.f64 d0, d2
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vrintx.f32 s0, s2
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 1.00 1.00 vrintx.f64 d0, d2
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vseleq.f32 s0, s2, s1
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 1.00 1.00 vseleq.f64 d0, d2, d1
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vsqrt.f32 s0, s2
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 1.00 1.00 vsqrt.f64 d0, d2
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 0.50 0.50 vsub.f32 s0, s2, s1
|
||
|
|
# CHECK-NEXT: - - - - - - - - - - 1.00 1.00 1.00 vsub.f64 d0, d2, d1
|
||
|
|
# CHECK-NEXT: - - - 0.50 0.50 - - - - - - 1.00 1.00 vldr d0, [r0]
|
||
|
|
# CHECK-NEXT: - - - 0.50 0.50 - - - - - - 0.50 0.50 vldr s0, [r0]
|
||
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - 1.00 1.00 vstr d0, [r0]
|
||
|
|
# CHECK-NEXT: - - - - - - - - - 1.00 - 0.50 0.50 vstr s0, [r0]
|